SN54AC14-SP

ACTIVO

Inversores de 6 canales, 2 V a 6 V con entradas de disparador Schmitt de calidad espacial

Detalles del producto

Technology family AC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 6 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 80 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Very high speed (tpd 5-10ns) Rating Space Operating temperature range (°C) -55 to 125
Technology family AC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 6 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 80 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Very high speed (tpd 5-10ns) Rating Space Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67 CFP (W) 14 58.023 mm² 9.21 x 6.3
  • 2-V to 6-V VCC Operation
  • Inputs Accept Voltages to 6 V
  • Max tpd of 9.5 ns at 5 V
  • Rad-Tolerant: 50 kRad(Si) TID(1)
    • TID Dose Rate < 2mRad/sec
  • QML-V Qualified, SMD 5962-87624

(1) Radiation tolerance is a typical value based upon initial device qualification. Radiation Lot Acceptance Testing is available - contact factory for details.

  • 2-V to 6-V VCC Operation
  • Inputs Accept Voltages to 6 V
  • Max tpd of 9.5 ns at 5 V
  • Rad-Tolerant: 50 kRad(Si) TID(1)
    • TID Dose Rate < 2mRad/sec
  • QML-V Qualified, SMD 5962-87624

(1) Radiation tolerance is a typical value based upon initial device qualification. Radiation Lot Acceptance Testing is available - contact factory for details.

These Schmitt-trigger devices contain six independent inverters. They perform the Boolean function Y = A. Because of the Schmitt action, they have different input threshold levels for positive-going (VT+) and for negative-going (VT–) signals.

These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean, jitter-free output signals. They also have a greater noise margin than conventional inverters.

These Schmitt-trigger devices contain six independent inverters. They perform the Boolean function Y = A. Because of the Schmitt action, they have different input threshold levels for positive-going (VT+) and for negative-going (VT–) signals.

These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean, jitter-free output signals. They also have a greater noise margin than conventional inverters.

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Documentación técnica

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Tipo Título Fecha
* Data sheet Rad-Tolerant Class V, Hex Schmitt-Trigger Inverter datasheet (Rev. B) 07 mar 2012
* SMD SN54AC14-SP SMD 5962-87624 08 jul 2016
* Radiation & reliability report SN54AC14-SP - 50 krad(Si) Total Ionizing Dose (TID) Characterization Report 26 mar 2015
Application brief DLA Approved Optimizations for QML Products (Rev. A) PDF | HTML 05 jun 2024
Selection guide TI Space Products (Rev. J) 12 feb 2024
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 31 ago 2023
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 17 nov 2022
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 oct 2022
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 jul 2021
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
More literature HiRel Unitrode Power Management Brochure 07 jul 2009
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 jun 1997
Application note Designing With Logic (Rev. C) 01 jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 oct 1996
Application note Live Insertion 01 oct 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 abr 1996

Diseño y desarrollo

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
CDIP (J) 14 Ultra Librarian
CFP (W) 14 Ultra Librarian

Pedidos y calidad

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