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Búferes y controladores no inversores

SN74ALVCHS162830A

ACTIVO

Búferes de 18 canales, 2.3 V a 3.6 V con retención de bus y salidas de 3 estados

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SN74ALVCHS162830A

ACTIVO
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Detalles del producto

Technology family ALVC Supply voltage (min) (V) 2.3 Supply voltage (max) (V) 3.6 Number of channels 18 IOL (max) (mA) 12 Supply current (max) (µA) 20 IOH (max) (mA) -12 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Damping resistors, Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family ALVC Supply voltage (min) (V) 2.3 Supply voltage (max) (V) 3.6 Number of channels 18 IOL (max) (mA) 12 Supply current (max) (µA) 20 IOH (max) (mA) -12 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Damping resistors, Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
TVSOP (DBB) 80 137.7 mm² 17 x 8.1
  • Member of the Texas Instruments Widebus™ Family
  • Output Ports Have Series Damping Resistors, So No External Resistors Are Required
  • Diodes on Inputs Clamp Overshoot
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.
  • Member of the Texas Instruments Widebus™ Family
  • Output Ports Have Series Damping Resistors, So No External Resistors Are Required
  • Diodes on Inputs Clamp Overshoot
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.

This 1-bit to 2-bit address driver is designed for 2.3-V to 3.6-V VCC operation.

Diodes to VCC have been added on the inputs to clamp overshoot.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

The outputs, which are designed to sink up to 12 mA, include series damping resistors to reduce overshoot and undershoot.

The ALVCHS162830A is an improved version of the LVCHS162830 (non-A version) and has been optimized for lower power consumption and higher AC drive. Higher AC drive provides capability to drive loads with a faster edge rate.

To ensure the high-impedance state during power up or power down, the output-enable (OE)\ input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This 1-bit to 2-bit address driver is designed for 2.3-V to 3.6-V VCC operation.

Diodes to VCC have been added on the inputs to clamp overshoot.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

The outputs, which are designed to sink up to 12 mA, include series damping resistors to reduce overshoot and undershoot.

The ALVCHS162830A is an improved version of the LVCHS162830 (non-A version) and has been optimized for lower power consumption and higher AC drive. Higher AC drive provides capability to drive loads with a faster edge rate.

To ensure the high-impedance state during power up or power down, the output-enable (OE)\ input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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Documentación técnica

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Tipo Título Fecha
* Data sheet 74ALVCHS162830A datasheet 09 feb 2005
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
User guide ALVC Advanced Low-Voltage CMOS Including SSTL, HSTL, And ALB (Rev. B) 01 ago 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 jun 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 may 2002
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) 08 sep 1999
Application note TI SN74ALVC16835 Component Specification Analysis for PC100 03 ago 1998
Application note Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A) 13 may 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 dic 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 ago 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 oct 1996
Application note Live Insertion 01 oct 1996
Application note Understanding Advanced Bus-Interface Products Design Guide 01 may 1996

Diseño y desarrollo

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Modelo de simulación

SN74ALVCHS162830A Behavioral SPICE Model

SCEM748.ZIP (7 KB) - PSpice Model
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TVSOP (DBB) 80 Ultra Librarian
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