TXB0104

ACTIVO

Conmutador de nivel de tensión bidireccional de 4 bits con detección de dirección automática y prote

Detalles del producto

Technology family TXB Applications I2S, JTAG, SPI, UART Bits (#) 4 Data rate (max) (Mbps) 100 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 1.2 Vout (max) (V) 5.5 IOH (max) (mA) -0.02 IOL (max) (mA) 0.02 Supply current (max) (µA) 10 Features Edge rate accelerator, Integrated pullup resistors, Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
Technology family TXB Applications I2S, JTAG, SPI, UART Bits (#) 4 Data rate (max) (Mbps) 100 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 1.2 Vout (max) (V) 5.5 IOH (max) (mA) -0.02 IOL (max) (mA) 0.02 Supply current (max) (µA) 10 Features Edge rate accelerator, Integrated pullup resistors, Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YZT) 12 3.9375 mm² 2.25 x 1.75 NFBGA (NMN) 12 5 mm² 2 x 2.5 SOIC (D) 14 51.9 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 UQFN (RUT) 12 3.4 mm² 2 x 1.7 VQFN (RGY) 14 12.25 mm² 3.5 x 3.5
  • 1.2-V to 3.6-V on A port and 1.65-V to 5.5-V on B port (VCCA ≤ VCCB)
  • VCC isolation feature: if either VCC input ss at GND, all outputs are in the high-impedance state
  • Output enable (OE) input circuit referenced to VCCA
  • Low power consumption, 5-µA maximum ICC
  • I OFF supports partial power-down mode operation
  • Latch-up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port:
      • 2500-V Human-Body Model (A114-B)
      • 1500-V Charged-Device Model (C101)
    • B Port:
      • ±15-kV Human-Body Model (A114-B)
      • 1500-V Charged-Device Model (C101)
  • 1.2-V to 3.6-V on A port and 1.65-V to 5.5-V on B port (VCCA ≤ VCCB)
  • VCC isolation feature: if either VCC input ss at GND, all outputs are in the high-impedance state
  • Output enable (OE) input circuit referenced to VCCA
  • Low power consumption, 5-µA maximum ICC
  • I OFF supports partial power-down mode operation
  • Latch-up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port:
      • 2500-V Human-Body Model (A114-B)
      • 1500-V Charged-Device Model (C101)
    • B Port:
      • ±15-kV Human-Body Model (A114-B)
      • 1500-V Charged-Device Model (C101)

This TXB0104 4-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. VCCA must not exceed VCCB.

When the OE input is low, all outputs are placed in the high-impedance state. To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor The current sourcing capability of the driver determines the minimum value of the resistor.

The TXB0104 device is designed so the OE input circuit is supplied by VCCA.

This device is fully specified for partial power-down applications using I OFF. The I OFF circuitry disables the outputs, which prevents damaging current backflow through the device when the device is powered down.

This TXB0104 4-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. VCCA must not exceed VCCB.

When the OE input is low, all outputs are placed in the high-impedance state. To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor The current sourcing capability of the driver determines the minimum value of the resistor.

The TXB0104 device is designed so the OE input circuit is supplied by VCCA.

This device is fully specified for partial power-down applications using I OFF. The I OFF circuitry disables the outputs, which prevents damaging current backflow through the device when the device is powered down.

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Documentación técnica

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Tipo Título Fecha
* Data sheet TXB0104 4-Bit Bidirectional Voltage-Level Translator With Automatic Direction Sensing and ±15-kV ESD Protection datasheet (Rev. J) PDF | HTML 02 oct 2020
Application note Overcoming TXB-Type Translators Design Challenges PDF | HTML 18 sep 2024
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 12 jul 2024
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 03 jul 2024
Application note Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters PDF | HTML 29 sep 2023
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 05 sep 2023
Application note Do’s and Don’ts for TXB and TXS Voltage Level-Shifters with Edge Rate Accelerato PDF | HTML 28 jun 2023
Product overview Enabling System on Module Industrial PC Connectivity With Level Translation PDF | HTML 03 abr 2023
Application brief Enabling Smart Solar Inverter Designs with Level Translation PDF | HTML 31 oct 2022
EVM User's guide TXB-EVM Evaluation Module User's Guide (Rev. A) PDF | HTML 02 ago 2021
Selection guide Voltage Translation Buying Guide (Rev. A) 15 abr 2021
Application note Optimizing Video Doorbell Designs with Common Logic Use Cases (Rev. A) PDF | HTML 01 abr 2021
Application note 2N7001T Voltage Level Translator for SPI, UART, JTAG Interface (Rev. A) PDF | HTML 29 mar 2021
Application note Effects of pullup and pulldown resistors on TXS and TXB devices (Rev. A) 28 mar 2018
Application note Factors Affecting VOL for TXS and LSF Auto-bidirectional Translation Devices 19 nov 2017
Application note Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators 30 oct 2017
Application note A Guide to Voltage Translation With TXS-Type Translators 29 jun 2010
Application note A Guide to Voltage Translation With TXB-Type Translators 03 mar 2010

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

14-24-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados D, DB, DGV, DW, DYY, NS y PW de

El módulo de evaluación 14-24-LOGIC-EVM (EVM) está diseñado para admitir cualquier dispositivo lógico que esté en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.

Guía del usuario: PDF | HTML
Placa de evaluación

14-24-NL-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados sin conductores de 14 a 24 pine

14-24-NL-LOGIC-EVM es un módulo de evaluación (EVM) flexible diseñado para admitir cualquier dispositivo lógico o de traducción que tenga un encapsulado BQA, BQB, RGY, RSV, RJW o RHL de 14 a 24 pines.

Guía del usuario: PDF | HTML
Placa de evaluación

TXB-EVM — Módulo de evaluación de la familia de conversores TXB de 1 a 8 bits

This EVM is designed to support the TXB auto bidirectional families for single, dual, four and eight channel devices. The TXB devices belong to the auto bidirectional translation family with an operating voltage designed to level translation between 1.2V and 5.5 V.
Guía del usuario: PDF | HTML
Modelo de simulación

HSPICE Model for TXB0104

SCEJ249.ZIP (109 KB) - HSpice Model
Modelo de simulación

TXB0104 IBIS Model (Rev. C)

SCEM517C.ZIP (208 KB) - IBIS Model
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Design guide: PDF
Esquema: PDF
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Esquema: PDF
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This reference design demonstrates a simplified and efficient network to power an ADC32RFxx. All three power domains of the analog-to-digital converter (ADC) are supplied using a switching regulator to enable the use of a power-supply network without a low-dropout (LDO) linear regulator. (...)
Design guide: PDF
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Diseños de referencia

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Design guide: PDF
Esquema: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
DSBGA (YZT) 12 Ultra Librarian
NFBGA (NMN) 12 Ultra Librarian
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
UQFN (RUT) 12 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

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