The TXV0108-Q1 is an 8-bit, dual-supply direction controlled low-skew, low-jitter voltage translation device. This device can be used for redriving, voltage translation, and power isolation when implementing skew sensitive interface, such as RGMII between Ethernet MAC and PHY devices. The Ax I/O pins and control pins (DIR, OE) are referenced to VCCA logic levels, and Bx I/O pins are referenced to VCCB logic levels. This device has improved channel-to-channel skew, duty cycle distortion and symmetric rise and fall time for applications requiring strict timing conditions.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature is designed so that if either VCC supply is at or near 0V both ports will switch to a high-impedance state. This feature enables power isolation for communications across multiple MACs and PHYs, and is beneficial in situations where MACs and PHYs are powered up asynchronously preventing current backflow between devices.
A High on DIR allows data transmission from A to B while a Low on DIR allows data transmission from B to A when OE is set to Low. When OE is set to High, both Ax and Bx pins will be forced into a high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.
The TXV0108-Q1 is an 8-bit, dual-supply direction controlled low-skew, low-jitter voltage translation device. This device can be used for redriving, voltage translation, and power isolation when implementing skew sensitive interface, such as RGMII between Ethernet MAC and PHY devices. The Ax I/O pins and control pins (DIR, OE) are referenced to VCCA logic levels, and Bx I/O pins are referenced to VCCB logic levels. This device has improved channel-to-channel skew, duty cycle distortion and symmetric rise and fall time for applications requiring strict timing conditions.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature is designed so that if either VCC supply is at or near 0V both ports will switch to a high-impedance state. This feature enables power isolation for communications across multiple MACs and PHYs, and is beneficial in situations where MACs and PHYs are powered up asynchronously preventing current backflow between devices.
A High on DIR allows data transmission from A to B while a Low on DIR allows data transmission from B to A when OE is set to Low. When OE is set to High, both Ax and Bx pins will be forced into a high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.