ISO7821LLS
- Complies with TIA/EIA-644-A LVDS Standard
- Signaling Rate: 50 Mbps to 150 Mbps
- Optimized for DC-Balanced Data
- Wide Supply Range: 3 V to 5.5 V
- Wide Temperature Range: –55°C to 125°C
- Low-Power Consumption, Typical 10.3 mA per Channel at 150 Mbps
- Low Propagation Delay: 17 ns Typical
- Industry leading CMTI(Min): ±100 kV/μs
- Robust Electromagnetic Compatibility (EMC)
- System-Level ESD, EFT, and Surge Immunity
- Low Emissions
- Isolation Barrier Life: > 40 Years
- SOIC-16 Wide Body (DW) and Extra-Wide Body (DWW) Package Options
- Isolation Surge Withstand Voltage 12800 VPK
- Safety-Related Certifications:
- 8000-VPK Reinforced Isolation per DIN V VDE V 0884–10 (VDE V 0884–10): 2006–12
- 5700-VRMS Isolation for 1 minute per UL 1577
- CSA Component Acceptance Notice 5A, IEC 60950–1 and IEC 60601–1 End Equipment Standards
- TUV Certification per EN 61010-1 and EN 60950-1
- CQC Certification per GB4943.1–2011
- All Certifications are Planned
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The ISO7821LLS device is a high-performance, isolated dual-LVDS buffer with 8000-VPK isolation voltage. This device provides high electromagnetic immunity and low emissions at low-power consumption, while isolating the LVDS bus signal. Each isolation channel has an LVDS receive and transmit buffer. Timing performance for the ISO7821LLS device is optimized for use with communication systems that use DC-balanced data streams which is achieved through an internal distortion correction scheme.
The ISO7821LLS device has one forward and one reverse-direction channel.
Through innovative chip design and layout techniques, the electromagnetic compatibility of the ISO7821LLS device has been significantly enhanced to ease system-level ESD, EFT, surge, and emissions compliance.
The ISO7821LLS device is available in a 16-pin SOIC wide-body (DW) and extra-wide body (DWW) packages.
For all available packages, see the orderable addendum at the end of the data sheet.기술 자료
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
ISO7821LLSEVM — 고성능 절연 듀얼 LVDS 양방향 버퍼(DC 밸런스 데이터 스트림용) EVM
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
SOIC (DW) | 16 | Ultra Librarian |
SOIC (DWW) | 16 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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