홈 RF 및 마이크로파 RF 증폭기 RF VGA
홈
RF 및 마이크로파
RF 증폭기
RF VGA

LMH6521

활성

고성능 듀얼 DVGA

지금 주문
데이터 시트

LMH6521

활성
데이터 시트 지금 주문

제품 상세 정보

2nd harmonic (dBc) 84 3rd harmonic (dBc) 83 Frequency of harmonic distortion measurement (MHz) 200 Acl, min spec gain (V/V) 0.53 Architecture Fully Differential ADC Driver, VGA BW at Acl (MHz) 1400 Gain (max) (dB) 26 Gain (min) (dB) -5.5 Step size (dB) 0.5 Type RF VGA Iq per channel (typ) (mA) 113 Number of channels 2 Rating Catalog Operating temperature range (°C) -40 to 85 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.75 Vs (min) (V) 4.75 Vs (max) (V) 5.25
2nd harmonic (dBc) 84 3rd harmonic (dBc) 83 Frequency of harmonic distortion measurement (MHz) 200 Acl, min spec gain (V/V) 0.53 Architecture Fully Differential ADC Driver, VGA BW at Acl (MHz) 1400 Gain (max) (dB) 26 Gain (min) (dB) -5.5 Step size (dB) 0.5 Type RF VGA Iq per channel (typ) (mA) 113 Number of channels 2 Rating Catalog Operating temperature range (°C) -40 to 85 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.75 Vs (min) (V) 4.75 Vs (max) (V) 5.25
WQFN (RTV) 32 25 mm² 5 x 5
  • OIP3 of 48.5 dBm at 200 MHz
  • Maximum Voltage Gain of 26 dB
  • Gain Range: 31.5 dB with 0.5-dB Step Size
  • Channel Gain Matching of ±0.04 dB
  • Noise Figure: 7.3 dB at Maximum Gain
  • –3-dB Bandwidth of 1200 MHz
  • Low Power Dissipation
  • Independent Channel Power Down
  • Three Gain Control Modes:
    • Parallel Interface
    • Serial Interface (SPI)
    • Pulse Mode Interface
  • Temperature Range: –40°C to +85°C
  • Thermally-Enhanced, 32-Pin WQFN Package
  • OIP3 of 48.5 dBm at 200 MHz
  • Maximum Voltage Gain of 26 dB
  • Gain Range: 31.5 dB with 0.5-dB Step Size
  • Channel Gain Matching of ±0.04 dB
  • Noise Figure: 7.3 dB at Maximum Gain
  • –3-dB Bandwidth of 1200 MHz
  • Low Power Dissipation
  • Independent Channel Power Down
  • Three Gain Control Modes:
    • Parallel Interface
    • Serial Interface (SPI)
    • Pulse Mode Interface
  • Temperature Range: –40°C to +85°C
  • Thermally-Enhanced, 32-Pin WQFN Package

The LMH6521 contains two high performance, digitally controlled variable gain amplifiers (DVGA).

Both channels of the LMH6521 have an independent, digitally controlled attenuator followed by a high linearity, differential output amplifier. Each block has been optimized for low distortion and maximum system design flexibility. Each channel has a high speed power down mode.

The internal digitally controlled attenuator provides precise 0.5-dB gain steps over a 31.5-dB range. Serial and parallel programming options are provided. Serial mode programming uses the SPI interface. A pulse mode is also offered where simple up or down commands can change the gain one step at a time.

The output amplifier has a differential output allowing 10-VPPD signal swings on a single 5-V supply. The low impedance output provides maximum flexibility when driving filters or analog to digital converters.

The LMH6521 contains two high performance, digitally controlled variable gain amplifiers (DVGA).

Both channels of the LMH6521 have an independent, digitally controlled attenuator followed by a high linearity, differential output amplifier. Each block has been optimized for low distortion and maximum system design flexibility. Each channel has a high speed power down mode.

The internal digitally controlled attenuator provides precise 0.5-dB gain steps over a 31.5-dB range. Serial and parallel programming options are provided. Serial mode programming uses the SPI interface. A pulse mode is also offered where simple up or down commands can change the gain one step at a time.

The output amplifier has a differential output allowing 10-VPPD signal swings on a single 5-V supply. The low impedance output provides maximum flexibility when driving filters or analog to digital converters.
filter 기타 RF VGA 찾기
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기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
13개 모두 보기
유형 직함 날짜
* Data sheet LMH6521 High Performance Dual DVGA datasheet (Rev. E) PDF | HTML 2016/08/23
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017/03/28
User guide Using the LMH6521 in DC Coupled Applications Design Guide 2015/01/08
Design guide TSW1265 Dual-Wideband RF-to-Digital Receiver Design Guide 2013/09/03
Design guide TSW1266 Wideband RF-to-Digital Complex Receiver-Feedback Signal Chain 2013/09/03
Application note AN-1719 Noise Figure Analysis Fully Differential Amplifier (Rev. A) 2013/05/01
EVM User's guide AN-2045 LMH6521EVAL Evaluation Board (Rev. A) 2013/05/01
Application note AN-2235 Ckt Brd Design for LMH6517/21/22 & Other H-Sp IF/RF F Amp (Rev. A) 2013/05/01
Application note Between the Amplifier and ADC: Managing Filter Loss in Communications Systems (Rev. B) 2013/04/26
Application note Drivng HSpeed ADCs w/LMH6521 DVGA for High IF AC-Coupled Apps (Rev. A) 2013/04/26
Application note Using High Speed Diff Amp to Drive ADCs (Rev. A) 2013/04/26
More literature Featured High Speed Differential Amplifiers 2012/10/23
Application note A Walk Along the Signal Path (High-Speed Signal Path) 2005/03/30

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

TSW1265EVM — 광대역 듀얼 리시버 레퍼런스 디자인 및 평가 플랫폼

The TSW1265EVM is a wideband dual receiver reference design and evaluation platform. The signal chain allows conversion from RF to bits using a dual-channel downconverter mixer, the LMH6521 dual-channel DVGA, and the ADS4249 14-bit 250-MSPS ADC. The TSW1265EVM also includes the LMK04800 dual-PLL (...)

사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

LMH6521 ADS2009 Spice Model

SNOJ009.ZIP (46 KB) - Spice Model
다운로드
시뮬레이션 모델

LMH6521 PSpice Model

SNOM715.ZIP (68 KB) - PSpice Model
다운로드
시뮬레이션 모델

LMH6521 TINA-TI Reference Design

SNOM321.TSC (286 KB) - TINA-TI Reference Design
다운로드
시뮬레이션 모델

LMH6521 TINA-TI Spice Model

SNOM322.ZIP (8 KB) - TINA-TI Spice Model
다운로드
레퍼런스 디자인

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The increasing demand on wireless networks to provide faster data links to customers has driven transceiver hardware to increasingly demanding performance with enough bandwidth to support the largest standardized multi-carrier frequency bands (with band aggregation in some cases) and enough (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00353 — JESD204B 직렬 링크의 이퀄라이제이션 최적화 레퍼런스 디자인

Employing equalization techniques is an effective way of compensating for channel loss in JESD204B high speed serial interfaces for data converters. This reference design features the ADC16DX370, a dual 16-bit, 370 MSPS analog-to-digital converter (ADC) that utilizes de-emphasis equalization to (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00074 — 광대역 RF-디지털 복합 리시버-피드백 신호 체인

This is a wideband complex-receiver reference design and evaluation platform that is ideally suited for use as a feedback receiver for transmitter digital predistortion. The EVM signal chain is ideal for high intermediate-frequency (IF) complex-feedback applications and contains a complex (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00073 — 듀얼 광대역 RF-디지털 리시버 설계

The TSW1265EVM is an example design of a wideband RF to digital dual receiver solution capable of digitizing up to 125MHz of spectrum. The system provides a reference on how to use the ADS4249, LMH6521, LMK0480x, and a dual mixer to achieve this.  This reference EVEM coupled with a capture (...)
Design guide: PDF
회로도: PDF
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주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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