首頁 放大器 運算放大器 (op amps) 高速運算放大器 (GBW ≥ 50 MHz)
首頁
放大器
運算放大器 (op amps)
高速運算放大器 (GBW ≥ 50 MHz)

BUF602

現行

1000MHz、寬頻、高速、封閉迴路緩衝器

立即訂購
產品規格表

BUF602

現行
產品規格表 立即訂購

產品詳細資料

Architecture Fixed Gain/Buffer Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12.6 GBW (typ) (MHz) 1000 BW at Acl (MHz) 1000 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 8000 Vn at flatband (typ) (nV√Hz) 4.8 Vn at 1 kHz (typ) (nV√Hz) 5.9 Iq per channel (typ) (mA) 5.8 Vos (offset voltage at 25°C) (max) (mV) 30 Rail-to-rail No Rating Catalog Operating temperature range (°C) -45 to 85 Input bias current (max) (pA) 7000000 Offset drift (typ) (µV/°C) 125 Iout (typ) (mA) 60 2nd harmonic (dBc) 76 3rd harmonic (dBc) 98 Frequency of harmonic distortion measurement (MHz) 5
Architecture Fixed Gain/Buffer Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12.6 GBW (typ) (MHz) 1000 BW at Acl (MHz) 1000 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 8000 Vn at flatband (typ) (nV√Hz) 4.8 Vn at 1 kHz (typ) (nV√Hz) 5.9 Iq per channel (typ) (mA) 5.8 Vos (offset voltage at 25°C) (max) (mV) 30 Rail-to-rail No Rating Catalog Operating temperature range (°C) -45 to 85 Input bias current (max) (pA) 7000000 Offset drift (typ) (µV/°C) 125 Iout (typ) (mA) 60 2nd harmonic (dBc) 76 3rd harmonic (dBc) 98 Frequency of harmonic distortion measurement (MHz) 5
SOIC (D) 8 29.4 mm² 4.9 x 6 SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Wide Bandwidth: 1000MHz
  • High Slew Rate: 8000V/µs
  • Flexible Supply Range:
    ±1.4V to ±6.3V Dual Supplies
    +2.8V to +12.6V Single Supply
  • Output Current: 60mA (continuous)
  • Peak Output Current: 350mA
  • Low Quiescent Current: 5.8mA
  • Standard Buffer Pinout
  • Optional Mid-Supply Reference Buffer
  • APPLICATIONS
    • Low Impedance Reference Buffers
    • Clock Distribution Circuits
    • Video/Broadcast Equipment
    • Communications Equipment
    • High-Speed Data Acquisition
    • Test Equipment and Instrumentation

All other trademarks are the property of their respective owners.
  • Wide Bandwidth: 1000MHz
  • High Slew Rate: 8000V/µs
  • Flexible Supply Range:
    ±1.4V to ±6.3V Dual Supplies
    +2.8V to +12.6V Single Supply
  • Output Current: 60mA (continuous)
  • Peak Output Current: 350mA
  • Low Quiescent Current: 5.8mA
  • Standard Buffer Pinout
  • Optional Mid-Supply Reference Buffer
  • APPLICATIONS
    • Low Impedance Reference Buffers
    • Clock Distribution Circuits
    • Video/Broadcast Equipment
    • Communications Equipment
    • High-Speed Data Acquisition
    • Test Equipment and Instrumentation

All other trademarks are the property of their respective owners.

The BUF602 is a closed-loop buffer recommended for a wide range of applications. Its wide bandwidth (1000MHz) and high slew rate (8000V/µs) make it ideal for buffering very high-frequency signals. For AC-coupled applications, an optional mid-point reference (VREF) is provided, reducing the number of external components required and the necessary supply current to provide that reference.

The BUF602 is available in a standard SO-8 surface-mount package and in an SOT23-5 where a smaller footprint is needed.

The BUF602 is a closed-loop buffer recommended for a wide range of applications. Its wide bandwidth (1000MHz) and high slew rate (8000V/µs) make it ideal for buffering very high-frequency signals. For AC-coupled applications, an optional mid-point reference (VREF) is provided, reducing the number of external components required and the necessary supply current to provide that reference.

The BUF602 is available in a standard SO-8 surface-mount package and in an SOT23-5 where a smaller footprint is needed.
filter 尋找其它 高速運算放大器 (GBW ≥ 50 MHz)
下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
引腳對引腳且具備與所比較裝置相同的功能
LMH6559 現行 1750MHz、高速、閉合迴路緩衝器 Wider BW (1.75 GHz), lower noise (3.9 nV√Hz).
功能相同，但引腳輸出與所比較的裝置不同
BUF802 現行 寬頻、2.3-nV/√Hz、高輸入阻抗 JFET 緩衝器 For JFET, higher bandwidth (3.1 GHz) & lower noise (2.3 nV/√Hz)

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 5
類型 標題 日期
* Data sheet High-Speed, Closed-Loop Buffer datasheet (Rev. B) 2008年 5月 22日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
User guide DEM-BUF-SO-1A Demonstration Fixture (Rev. B) 2012年 4月 12日
User guide DEM-BUF-SOT-1A User's Guide (Rev. A) 2011年 4月 22日
User guide DEM-BUF-SO-1A Demonstration Fixture (Rev. A) 2010年 3月 28日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DEM-BUF-SO-1A — DEM-BUF-SO-1A

<p>The <b>DEM-BUF-SO-1A</b> demonstration fixture helps designers evaluate the operation and performance of TI's high speed, closed-loop buffers. This unpopulated PC board is compatible with products offered in the 8-lead SOIC (D) package.</p>

<p>For more information on this type of buffer (...)

使用指南: PDF
TI.com 無法提供
開發板

DEM-BUF-SOT-1A — DEM-BUF-SOT-1A

使用指南: PDF
TI.com 無法提供
模擬型號

BUF602 PSpice Model (Rev. B)

SBOJ002B.ZIP (39 KB) - PSpice Model
下載
模擬型號

BUF602 TINA-TI Reference Design

SBOMA37.TSC (2972 KB) - TINA-TI Reference Design
下載
模擬型號

BUF602 TINA-TI Spice Model

SBOMA38.ZIP (6 KB) - TINA-TI Spice Model
下載
計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
View Options
計算工具

VOLT-DIVIDER-CALC — Voltage divider calculation tool

The voltage divider calculation tool (VOLT-DIVIDER-CALC) quickly determines a set of resistors for a voltage divider. This KnowledgeBase JavaScript utility can be used to find a set of resistors for a voltage divider to achieve the desired output voltage. VOLT-DIVIDER-CALC can also be used to (...)
立即進行設計
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
View Options
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 8 Ultra Librarian
SOT-23 (DBV) 5 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片