產品詳細資料

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 5 Rail-to-rail In to V-, Out GBW (typ) (MHz) 0.35 Slew rate (typ) (V/µs) 0.11 Vos (offset voltage at 25°C) (max) (mV) 3 Iq per channel (typ) (mA) 0.04 Vn at 1 kHz (typ) (nV√Hz) 42 Rating Catalog Operating temperature range (°C) -40 to 85 Offset drift (typ) (µV/°C) 1.3 Input bias current (max) (pA) 4 CMRR (typ) (dB) 83 Iout (typ) (A) 0.021 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.4 Input common mode headroom (to positive supply) (typ) (V) -1.9 Output swing headroom (to negative supply) (typ) (V) 0.004 Output swing headroom (to positive supply) (typ) (V) -0.013
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 5 Rail-to-rail In to V-, Out GBW (typ) (MHz) 0.35 Slew rate (typ) (V/µs) 0.11 Vos (offset voltage at 25°C) (max) (mV) 3 Iq per channel (typ) (mA) 0.04 Vn at 1 kHz (typ) (nV√Hz) 42 Rating Catalog Operating temperature range (°C) -40 to 85 Offset drift (typ) (µV/°C) 1.3 Input bias current (max) (pA) 4 CMRR (typ) (dB) 83 Iout (typ) (A) 0.021 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.4 Input common mode headroom (to positive supply) (typ) (V) -1.9 Output swing headroom (to negative supply) (typ) (V) 0.004 Output swing headroom (to positive supply) (typ) (V) -0.013
SOIC (D) 14 51.9 mm² 8.65 x 6
  • Rail-to-rail output swing
  • Micropower operation: (1 mW)
  • Specified for 100 kΩ and 5 kΩ loads
  • High voltage gain: 120 dB
  • Low input offset voltage: 3 mV
  • Low offset voltage drift: 1.3 μV/°C
  • Ultra low input bias current: 2 fA
  • Input common-mode includes V
  • Operation range from +5V to +15V
  • Low distortion: 0.01% at 1 kHz
  • Slew rate: 0.11 V/μs
  • Full military temp. range available

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  • Rail-to-rail output swing
  • Micropower operation: (1 mW)
  • Specified for 100 kΩ and 5 kΩ loads
  • High voltage gain: 120 dB
  • Low input offset voltage: 3 mV
  • Low offset voltage drift: 1.3 μV/°C
  • Ultra low input bias current: 2 fA
  • Input common-mode includes V
  • Operation range from +5V to +15V
  • Low distortion: 0.01% at 1 kHz
  • Slew rate: 0.11 V/μs
  • Full military temp. range available

All trademarks are the property of their respective owners.

The LPC660 CMOS Quad operational amplifier is ideal for operation from a single supply. It features a wide range of operating voltages from +5V to +15V and features rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input VOS, drift, and broadband noise as well as voltage gain (into 100 kΩ and 5 kΩ) are all equal to or better than widely accepted bipolar equivalents, while the power supply requirement is typically less than 1 mW.

This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.

See the LPC662 datasheet for a Dual CMOS operational amplifier and LPC661 datasheet for a single CMOS operational amplifier with these same features.

The LPC660 CMOS Quad operational amplifier is ideal for operation from a single supply. It features a wide range of operating voltages from +5V to +15V and features rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input VOS, drift, and broadband noise as well as voltage gain (into 100 kΩ and 5 kΩ) are all equal to or better than widely accepted bipolar equivalents, while the power supply requirement is typically less than 1 mW.

This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.

See the LPC662 datasheet for a Dual CMOS operational amplifier and LPC661 datasheet for a single CMOS operational amplifier with these same features.

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類型 標題 日期
* Data sheet LPC660 Low Power CMOS Quad Operational Amplifier datasheet (Rev. D) 2013年 3月 19日

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