NE5532A

現行

適用音訊應用的雙路、30-V、10-MHz、低雜訊 (6 nV/√Hz) 運算放大器

現在提供此產品的更新版本

open-in-new 比較替代產品
引腳對引腳且具備與所比較裝置相同的功能
TLV9362 現行 雙路、40-V、10.6-MHz 軌對軌輸出運算放大器 Wider supply range (4.5 V to 40 V), higher GBW (10.6 MHz), faster slew rate (25 V/us), lower offset voltage (1.7 mV), lower power (2.6 mA)

產品詳細資料

Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 30 GBW (typ) (MHz) 10 Slew rate (typ) (V/µs) 9 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 4 Iq per channel (typ) (mA) 4 Vn at 1 kHz (typ) (nV√Hz) 5 Features Standard Amps THD + N at 1 kHz (typ) (%) 0.002 Rating Catalog Operating temperature range (°C) 0 to 70 Iout (typ) (A) 0.038 Architecture Bipolar CMRR (typ) (dB) 100 Input bias current (max) (pA) 800000
Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 30 GBW (typ) (MHz) 10 Slew rate (typ) (V/µs) 9 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 4 Iq per channel (typ) (mA) 4 Vn at 1 kHz (typ) (nV√Hz) 5 Features Standard Amps THD + N at 1 kHz (typ) (%) 0.002 Rating Catalog Operating temperature range (°C) 0 to 70 Iout (typ) (A) 0.038 Architecture Bipolar CMRR (typ) (dB) 100 Input bias current (max) (pA) 800000
PDIP (P) 8 92.5083 mm² 9.81 x 9.43 SOIC (D) 8 29.4 mm² 4.9 x 6 SOP (PS) 8 48.36 mm² 6.2 x 7.8
  • Equivalent Input Noise Voltage:
    5 nV/√Hz Typ at 1 kHz
  • Unity-Gain Bandwidth: 10 MHz Typ
  • Common-Mode Rejection Ratio: 100 dB Typ
  • High DC Voltage Gain: 100 V/mV Typ
  • Peak-to-Peak Output Voltage Swing 26 V Typ With VCC± = ±15 V and RL = 600 Ω
  • High Slew Rate: 9 V/μs Typ
  • Equivalent Input Noise Voltage:
    5 nV/√Hz Typ at 1 kHz
  • Unity-Gain Bandwidth: 10 MHz Typ
  • Common-Mode Rejection Ratio: 100 dB Typ
  • High DC Voltage Gain: 100 V/mV Typ
  • Peak-to-Peak Output Voltage Swing 26 V Typ With VCC± = ±15 V and RL = 600 Ω
  • High Slew Rate: 9 V/μs Typ

The NE5532, NE5532A, SA5532, and SA5532A devices are high-performance operational amplifiers combining excellent DC and AC characteristics. They feature very low noise, high output-drive capability, high unity-gain and maximum-output-swing bandwidths, low distortion, high slew rate, input-protection diodes, and output short-circuit protection. These operational amplifiers are compensated internally for unity-gain operation. These devices have specified maximum limits for equivalent input noise voltage.

The NE5532, NE5532A, SA5532, and SA5532A devices are high-performance operational amplifiers combining excellent DC and AC characteristics. They feature very low noise, high output-drive capability, high unity-gain and maximum-output-swing bandwidths, low distortion, high slew rate, input-protection diodes, and output short-circuit protection. These operational amplifiers are compensated internally for unity-gain operation. These devices have specified maximum limits for equivalent input noise voltage.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 2
類型 標題 日期
* Data sheet NE5532x, SA5532x Dual Low-Noise Operational Amplifiers datasheet (Rev. J) PDF | HTML 2015年 1月 27日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件,可測試通用運算放大器 (op amp) 參數,並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項,可滿足封裝需求,使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝,包括:

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
PDIP (P) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian
SOP (PS) 8 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片