Startseite Schnittstelle LVDS-, M-LVDS- und PECL-ICs
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LVDS-, M-LVDS- und PECL-ICs

DS90LV047A

AKTIV

Vierfach-Highspeed-LVDS-Differenzialtreiber, 400 Mbit/s

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Datenblatt

DS90LV047A

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal CMOS, LVTTL, TTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal CMOS, LVTTL, TTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • >400-Mbps (200 MHz) Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 300-ps Typical Differential Skew
  • 400-ps Maximum Differential Skew
  • 1.7-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • ±350-mV Differential Signaling
  • Low Power Dissipation (13 mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Receivers
  • High impedance on LVDS Outputs on Power Down
  • Conforms to TIA/EIA-644 LVDS Standard
  • Industrial Operating Temperature Range (–40°C to +85°C)
  • Available in Surface Mount SOIC and Low Profile TSSOP Package
  • >400-Mbps (200 MHz) Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 300-ps Typical Differential Skew
  • 400-ps Maximum Differential Skew
  • 1.7-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • ±350-mV Differential Signaling
  • Low Power Dissipation (13 mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Receivers
  • High impedance on LVDS Outputs on Power Down
  • Conforms to TIA/EIA-644 LVDS Standard
  • Industrial Operating Temperature Range (–40°C to +85°C)
  • Available in Surface Mount SOIC and Low Profile TSSOP Package

The DS90LV047A device is a quad CMOS flow-through differential line driver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV047A accepts low voltage TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition, the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical. The DS90LV047A has a flow-through pinout for easy PCB layout.

The EN and EN∗ inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV047A and companion line receiver (DS90LV048A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.

The DS90LV047A device is a quad CMOS flow-through differential line driver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV047A accepts low voltage TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition, the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical. The DS90LV047A has a flow-through pinout for easy PCB layout.

The EN and EN∗ inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV047A and companion line receiver (DS90LV048A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.
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Technische Dokumentation

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Typ Titel Datum
* Data sheet DS90LV047A 3-V LVDS Quad CMOS Differential Line Driver datasheet (Rev. D) PDF | HTML 29 Jul 2016
Application note Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls 29 Okt 2020
Application note Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 29 Jun 2019
Application brief LVDS to Improve EMC in Motor Drives 27 Sep 2018
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 Aug 2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling 16 Mai 2018
Application note An Overview of LVDS Technology 05 Okt 1998

Design und Entwicklung

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Evaluierungsplatine

DS90LV047-48AEVM — DS90LV047-48AEVM-Evaluierungsmodul

The DS90LV047-48AEVM is an evaluation module (EVM) designed for performance and functional evaluation of Texas Instruments' DS90LV047A 3-V LVDS quad CMOS differential line driver and DS90LV048A 3-V LVDS CMOS differential line receiver. With this kit, users can quickly evaluate the output (...)
Benutzerhandbuch: PDF
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Simulationsmodell

DS90LV047A IBIS Model

SNLM022.ZIP (9 KB) - IBIS Model
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PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
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TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
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