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SN74AXC4T245-Q1

AKTIV

Bustransceiver für die Automobilindustrie, 4 Bit, 2 Spannungsversorgungen, mit konfigurierbarer Span

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SN74AXC4T245-Q1

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

Technology family AXC Applications JTAG, SPI, UART Bits (#) 2, 4 High input voltage (min) (V) 0.45, 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 23, 40 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type CMOS, Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Automotive Operating temperature range (°C) -40 to 125
Technology family AXC Applications JTAG, SPI, UART Bits (#) 2, 4 High input voltage (min) (V) 0.45, 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 23, 40 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type CMOS, Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (PW) 16 32 mm² 5 x 6.4 UQFN (RSV) 16 4.68 mm² 2.6 x 1.8 WQFN (BQB) 16 8.75 mm² 3.5 x 2.5
  • AEC-Q100 qualified for automotive applications
  • Available in wettable flank QFN (WBQB) package
  • Fully-configurable dual-rail design allows each port to operate with a power supply range from 0.65V to 3.6V
  • Operating temperature from –40°C to +125°C
  • Multiple direction control pins to allow simultaneous up and down translation
  • Glitch-free power supply sequencing
  • Up to 380 Mbps support when translating from 1.8V to 3.3V
  • VCC isolation feature:
    • If either VCC input is below 100mV, all I/O outputs are disabled and become high impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC-family level shifters
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JEDEC JS-001
    • 8000V human-body model
    • 1000V charged-device model
  • AEC-Q100 qualified for automotive applications
  • Available in wettable flank QFN (WBQB) package
  • Fully-configurable dual-rail design allows each port to operate with a power supply range from 0.65V to 3.6V
  • Operating temperature from –40°C to +125°C
  • Multiple direction control pins to allow simultaneous up and down translation
  • Glitch-free power supply sequencing
  • Up to 380 Mbps support when translating from 1.8V to 3.3V
  • VCC isolation feature:
    • If either VCC input is below 100mV, all I/O outputs are disabled and become high impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC-family level shifters
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JEDEC JS-001
    • 8000V human-body model
    • 1000V charged-device model

The SN74AXC4T245-Q1 AEC-Q100 qualified device is a four-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65V to 3.6V. Additionally the SN74AXC4T245-Q1 is compatible with a single-supply system.

The SN74AXC4T245-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1 OE and 2 OE) are used to disable the outputs so the buses are effectively isolated. The SN74AXC4T245-Q1 device is designed so the control pins (xDIR and x OE) are referenced to VCCA.

To put the level shifter I/Os in the high-impedance state during power up or power down, tie the x OE pins to VCCA through a pull-up resistor.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry is designed so that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature is designed so that if either VCCA or VCCB is less than 100mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-Free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

The SN74AXC4T245-Q1 AEC-Q100 qualified device is a four-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65V to 3.6V. Additionally the SN74AXC4T245-Q1 is compatible with a single-supply system.

The SN74AXC4T245-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1 OE and 2 OE) are used to disable the outputs so the buses are effectively isolated. The SN74AXC4T245-Q1 device is designed so the control pins (xDIR and x OE) are referenced to VCCA.

To put the level shifter I/Os in the high-impedance state during power up or power down, tie the x OE pins to VCCA through a pull-up resistor.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry is designed so that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature is designed so that if either VCCA or VCCB is less than 100mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-Free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
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Technische Dokumentation

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Typ Titel Datum
* Data sheet SN74AXC4T245-Q1 Automotive 4-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation and Tri-State Outputs datasheet (Rev. F) PDF | HTML 29 Jan 2024
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 12 Jul 2024
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 03 Jul 2024
Functional safety information SN74AXC4T245-Q1 Functional Safety FIT Rate, FMD and Pin FMA PDF | HTML 09 Mai 2024
Application brief Translate Voltages for UART (Rev. B) PDF | HTML 04 Aug 2021
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021

Design und Entwicklung

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Simulationsmodell

SN74AXC4T245 IBIS Model (Rev. A)

SCEM585A.ZIP (35 KB) - IBIS Model
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TSSOP (PW) 16 Ultra Librarian
UQFN (RSV) 16 Ultra Librarian
WQFN (BQB) 16 Ultra Librarian
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