The \x92FCT573T devices consist of eight latches with 3-state outputs for bus-organized applications. When the
latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup
times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE\)
input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode, data can be entered
into the latches. The \x92FCT573T devices are identical to the \x92FCT373T devices, except for the flow-through
pinout of the \x92FCT573T, which simplifies board design.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
The \x92FCT573T devices consist of eight latches with 3-state outputs for bus-organized applications. When the
latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup
times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE\)
input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode, data can be entered
into the latches. The \x92FCT573T devices are identical to the \x92FCT373T devices, except for the flow-through
pinout of the \x92FCT573T, which simplifies board design.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.