This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVC125 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVC125 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.