DS90LV001
- Single +3.3 V Supply
- LVDS Receiver Inputs Accept LVPECL Signals
- TRI-STATE Outputs
- Receiver Input Threshold < ±100 mV
- Fast Propagation Delay of 1.4 ns (Typ)
- Low Jitter 800 Mbps Fully Differential Data Path
- 100 ps (Typ) of pk-pk Jitter with PRBS = 223−1 Data Pattern at 800 Mbps
- Compatible with ANSI/TIA/EIA-644-A LVDS Standard
- 8 pin SOIC and Space Saving (70%) WSON Package
- Industrial Temperature Range
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The DS90LV001 LVDS-LVDS Buffer takes an LVDS input signal and provides an LVDS output signal. In many large systems, signals are distributed across backplanes, and one of the limiting factors for system speed is the "stub length" or the distance between the transmission line and the unterminated receivers on individual cards. Although it is generally recognized that this distance should be as short as possible to maximize system performance, real-world packaging concerns often make it difficult to make the stubs as short as the designer would like.
The DS90LV001, available in the WSON package, will allow the receiver to be placed very close to the main transmission line, thus improving system performance.
A wide input dynamic range will allow the DS90LV001 to receive differential signals from LVPECL as well as LVDS sources. This will allow the device to also fill the role of an LVPECL-LVDS translator.
An output enable pin is provided, which allows the user to place the LVDS output in TRI-STATE.
The DS90LV001 is offered in two package options, an 8 pin WSON and SOIC.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | DS90LV001 800 Mbps LVDS Buffer datasheet (Rev. E) | 2013/04/22 | |
| Application brief | How to Use a 3.3-V LVDS Buffer as a Low-Voltage LVDS Driver | 2019/01/09 | ||
| EVM User's guide | 3.3V LVDS-LVDS Buffer Evaluation Board User Guide | 2012/01/27 | ||
| Application note | Signaling Rate vs. Distance for Differential Buffers | 2010/01/26 | ||
| White paper | Making the Most of Your LVDS - 5 Tips for Buffering Signal Integrity Headaches | 2001/08/01 | ||
| Application note | An Overview of LVDS Technology | 1998/10/05 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
| WSON (NGK) | 8 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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