DS92LV2421
- 24-Bit Data, 3-Bit Control, 10- to 75-MHz Clock
- AC-Coupled STP Interconnect Cable up to 10 m
- Integrated Terminations on Serializer and
Deserializer - At-Speed Link BIST Mode and Reporting Pin
- Optional I2C-Compatible Serial Control Bus
- Power-Down Mode Minimizes Power Dissipation
- 1.8-V or 3.3-V Compatible LVCMOS I/O Interface
- –40° to 85°C Temperature Range
- >8-kV HBM
- Serializer (DS92LV2421)
- Data Scrambler for Reduced EMI
- DC-Balance Encoder for AC Coupling
- Selectable Output VOD and Adjustable
De-emphasis
- Deserializer (DS92LV2422)
- Fast Random Data Lock; No Reference Clock
Required - Adjustable Input Receiver Equalization
- LOCK (Real-Time Link Status) Reporting Pin
- EMI Minimization on Output Parallel Bus
(SSCG) - Output Slew Control (OS)
- Fast Random Data Lock; No Reference Clock
The DS92LV242x chipset translates a parallel 24–bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock information. This single serial stream eliminates skew issues between clock and data, reduces connector size, and reduces interconnect cost for transferring a 24-bit or less bus over FR-4 printed-circuit board backplanes and balanced cables. In addition, the DS92LV242x chipset also features a 3-bit control bus for slow speed signals. This allows for video and display applications with up to 24 bits per pixel (RGB).
Programmable transmit de-emphasis, receive equalization, on-chip scrambling, and DC balancing enables longer distance transmission over lossy cables and backplanes. The DS92LV2422 automatically locks to incoming data without an external reference clock or special sync patterns, providing easy plug-and-go operation. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking capability.
The DS92LV242x chipset is programmable though an I2C interface as well as through pins. A built-in, at-speed BIST feature validates link integrity and may be used for system diagnostics. The DS92LV2421 is offered in a 48-pin WQFN, and the DS92LV2422 is offered in a 60-pin WQFN package. Both devices operate over the full industrial temperature range of –40°C to 85°C.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | DS92LV242x 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer datasheet (Rev. C) | PDF | HTML | 2016/05/31 |
| Application note | High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs | 2018/11/09 | ||
| Application note | How to Design LVDS SerDes in Industrial Systems | 2018/07/16 | ||
| Technical article | Applications of Low Voltage Differential Signaling (LVDS) in Multifunction and Ind | PDF | HTML | 2017/08/24 | |
| Application note | DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E) | 2013/04/29 | ||
| User guide | LV24EVK01 Channel Link II Ser/Des Evaluation Kit User Guide | 2012/01/25 | ||
| Design guide | Channel Link II Design Guide | 2011/01/21 | ||
| Application note | Go the Distance: Industrial SerDes with Embedded Clock and Control | 2010/10/20 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
LV24EVK01 — LV24EVK01 평가 키트
The LV24EVK01 is an evaluation kit designed to demonstrate performance and capabilities of the DS92LV2421 and DS92LV2422 Channel Link II Serializer/Deserializer chipset.
The DS92LV2421 serializer board accepts LVCMOS input signals and provides a single serialized Channel Link II CML data pair as an (...)
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| WQFN (RHS) | 48 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.