홈 인터페이스 LVDS, M-LVDS 및 PECL
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인터페이스
LVDS, M-LVDS 및 PECL

DSLVDS1001

마지막 구매

400Mbps LVDS 단일 고속 차동 드라이버

지금 주문
데이터 시트

DSLVDS1001

마지막 구매
데이터 시트 지금 주문

제품 상세 정보

Function Driver Protocols LVDS Number of transmitters 1 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVCMOS, LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver Protocols LVDS Number of transmitters 1 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVCMOS, LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Designed for signaling rates up to 400-Mbps
  • Single 3.3-V Power Supply (3-V to 3.6-V Range)
  • 700-ps (100-ps typical) maximum differential skew
  • 1.5-ns maximum propagation delay
  • Drives small swing (±350-mV) differential signal levels
  • Power off protection (Outputs in TRI-STATE)
  • Flow-through pinout simplifies PCB layout
  • Low power dissipation (23-mW at 3.3 V typical)
  • 5-pin SOT-23 package
  • Meets or exceeds ANSI TIA/EIA-644-A standard
  • Industrial temperature operating range (–40°C to +85°C)
  • Designed for signaling rates up to 400-Mbps
  • Single 3.3-V Power Supply (3-V to 3.6-V Range)
  • 700-ps (100-ps typical) maximum differential skew
  • 1.5-ns maximum propagation delay
  • Drives small swing (±350-mV) differential signal levels
  • Power off protection (Outputs in TRI-STATE)
  • Flow-through pinout simplifies PCB layout
  • Low power dissipation (23-mW at 3.3 V typical)
  • 5-pin SOT-23 package
  • Meets or exceeds ANSI TIA/EIA-644-A standard
  • Industrial temperature operating range (–40°C to +85°C)

The DSLVDS1001 device is a single-channel, Low-Voltage Differential Signaling (LVDS) driver device designed for applications requiring low power dissipation, low noise, and high data rates. In addition, the short-circuit fault current is also minimized. The device is designed to support data rates that are up to 400-Mbps (200-MHz) using LVDS technology.

The DSLVDS1001 accepts a 3.3-V LVCMOS/LVTTL input level and outputs low voltage (±350-mV typical) differential signals that have low electromagnetic interference (EMI). The device is in a 5-pin SOT-23 package that is designed for easy PCB layout. The DSLVDS1001 can be paired with its companion single line receiver, the DSLVDS1002, or with any LVDS receiver, to provide a high-speed LVDS interface.

The DSLVDS1001 device is a single-channel, Low-Voltage Differential Signaling (LVDS) driver device designed for applications requiring low power dissipation, low noise, and high data rates. In addition, the short-circuit fault current is also minimized. The device is designed to support data rates that are up to 400-Mbps (200-MHz) using LVDS technology.

The DSLVDS1001 accepts a 3.3-V LVCMOS/LVTTL input level and outputs low voltage (±350-mV typical) differential signals that have low electromagnetic interference (EMI). The device is in a 5-pin SOT-23 package that is designed for easy PCB layout. The DSLVDS1001 can be paired with its companion single line receiver, the DSLVDS1002, or with any LVDS receiver, to provide a high-speed LVDS interface.
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* Data sheet DSLVDS1001 400-Mbps, Single-Channel LVDS Driver datasheet (Rev. A) PDF | HTML 2018/12/13

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치