LM5041
- Internal Start-up Bias Regulator
- Programmable Line Under-Voltage Lockout (UVLO) with Adjustable Hysteresis
- Current Mode Control
- Internal Error Amplifier with Reference
- Dual Mode Over-Current Protection
- Leading Edge Blanking
- Programmable Push-Pull Overlap or Dead Time
- Internal 1.5A Push-Pull Gate Drivers
- Programmable Soft-start
- Programmable Oscillator with Sync Capability
- Precision Reference
- Thermal Shutdown
Packages
- TSSOP-16
- WSON-16 (5x5 mm) Thermally Enhanced
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The LM5041 PWM controller contains all of the features necessary to implement either current-fed or voltage-fed push-pull or bridge power converters. These “Cascaded” topologies are well suited for multiple output and higher power applications. The LM5041’s four control outputs include: the buck stage controls (HD and LD) and the push-pull control outputs (PUSH and PULL). Push-pull outputs are driven at 50% nominal duty cycle at one half of the switching frequency of the buck stage and can be configured for either a specified overlap time (for current-fed applications) or a specified both-off time (for voltage-fed applications). Push-pull stage MOSFETs can be driven directly from the internal gate drivers while the buck stage requires an external driver such as the LM5102. The LM5041 includes a high-voltage start-up regulator that operates over a wide input range of 15V to 100V. The PWM controller is designed for high-speed capability including an oscillator frequency range up to 1 MHz and total propagation delays of less than 100ns. Additional features include: line Under-Voltage Lockout (UVLO), soft-start, an error amplifier, precision voltage reference, and thermal shutdown.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | LM5041 Cascaded PWM Controller datasheet (Rev. D) | 2013/03/25 | |
Selection guide | Power Management Guide 2018 (Rev. R) | 2018/06/25 | ||
EVM User's guide | AN-1299 LM5041 Evaluation Board (Rev. A) | 2013/05/06 | ||
Application note | DC - DC Converter Featuring the Cascaded Power Converter Topology | 2007/03/21 | ||
White paper | Communications System Power Supply Designs | 2004/01/01 |
설계 및 개발
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LM5041 Unencrypted PSpice Transient Model Package (Rev. A)
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
TSSOP (PW) | 16 | Ultra Librarian |
WSON (NHQ) | 16 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치