인터페이스 LVDS, M-LVDS 및 PECL

SN65LVDS122

활성

2x2 1.5Gbps LVDS 크로스포인트 스위치

제품 상세 정보

Function Crosspoint Protocols LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 1500 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Crosspoint Protocols LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 1500 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Designed for Signaling Rates(1) Up To 1.5 Gbps
  • Total Jitter < 65 ps
  • Pin-Compatible With SN65LVDS22 and SN65LVDM22
  • 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Common-Mode Range
  • Inputs Electrically Compatible With CML, LVPECL and LVDS Signal Levels
  • Propagation Delay Times, 900 ps Maximum
  • LVDT Integrates 110- Terminating Resistor
  • Offered in SOIC and TSSOP
  • APPLICATIONS
    • 10-G (OC–192) Optical Modules
    • 622 MHz Central Office Clock Distribution
    • Wireless Basestations
    • Low Jitter Clock Repeater/Multiplexer
    • Protection Switching for Serial Backplanes

(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

  • Designed for Signaling Rates(1) Up To 1.5 Gbps
  • Total Jitter < 65 ps
  • Pin-Compatible With SN65LVDS22 and SN65LVDM22
  • 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Common-Mode Range
  • Inputs Electrically Compatible With CML, LVPECL and LVDS Signal Levels
  • Propagation Delay Times, 900 ps Maximum
  • LVDT Integrates 110- Terminating Resistor
  • Offered in SOIC and TSSOP
  • APPLICATIONS
    • 10-G (OC–192) Optical Modules
    • 622 MHz Central Office Clock Distribution
    • Wireless Basestations
    • Low Jitter Clock Repeater/Multiplexer
    • Protection Switching for Serial Backplanes

(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

The SN65LVDS122 and SN65LVDT122 are crosspoint switches that use low voltage differential signaling (LVDS) to achieve signaling rates as high as 1.5 Gbps. They are pin-compatible speed upgrades to the SN65LVDS22 and SN65LVDM22. The internal signal paths maintain differential signaling for high speeds and low signal skews. These devices have a 0 V to 4 V common-mode input range that accepts LVDS, LVPECL, CML inputs. Two logic pins (S0 and S1) set the internal configuration between the differential inputs and outputs. This allows the flexibility to perform the following configurations: 2 x 2 crosspoint switch, 2:1 mux, 1:2 splitter or dual repeater/translator within a single device. Additionally, SN65LVDT122 incorporates a 110- termination resistor for those applications where board space is a premium. Although these devices are designed for 1.5 Gbps, some applications at a 2-Gbps data rate can be supported depending on loading and signal quality.

The intended application of this device is ideal for loopback switching for diagnostic routines, fanout buffering of clock/data distribution provide protection in fault-tolerant systems, clock muxing in optical modules, and for overall signal boosting over extended distances.

The SN65LVDS122 and SN65LVDT122 are characterized for operation from –40°C to 85°C.

The SN65LVDS122 and SN65LVDT122 are crosspoint switches that use low voltage differential signaling (LVDS) to achieve signaling rates as high as 1.5 Gbps. They are pin-compatible speed upgrades to the SN65LVDS22 and SN65LVDM22. The internal signal paths maintain differential signaling for high speeds and low signal skews. These devices have a 0 V to 4 V common-mode input range that accepts LVDS, LVPECL, CML inputs. Two logic pins (S0 and S1) set the internal configuration between the differential inputs and outputs. This allows the flexibility to perform the following configurations: 2 x 2 crosspoint switch, 2:1 mux, 1:2 splitter or dual repeater/translator within a single device. Additionally, SN65LVDT122 incorporates a 110- termination resistor for those applications where board space is a premium. Although these devices are designed for 1.5 Gbps, some applications at a 2-Gbps data rate can be supported depending on loading and signal quality.

The intended application of this device is ideal for loopback switching for diagnostic routines, fanout buffering of clock/data distribution provide protection in fault-tolerant systems, clock muxing in optical modules, and for overall signal boosting over extended distances.

The SN65LVDS122 and SN65LVDT122 are characterized for operation from –40°C to 85°C.

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기술 자료

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2개 모두 보기
유형 직함 날짜
* Data sheet SN65LVDS122, SN65LVDT122 - 1.5 Gbps 2 x 2 LVDS Crosspoint Switch datasheet (Rev. B) 2004/06/02
EVM User's guide SN65LVDS122EVM User's Guide (Rev. A) 2003/03/11

설계 및 개발

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평가 보드

SN65LVDS125AEVM — SN65LVDS125 평가 모듈

The SN65LVDS125A is a 4 x 4 non-blocking cross point switch. Low-Voltage differential signaling (LVDS) is used to achieve signaling rates of 1.5 Gbps per channel. Each output driver includes a 4:1 multiplexer to allow any input to be routed to any output.Internal signal paths are fully differential (...)

사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

SN65LVDS122 IBIS Model D PKG (Rev. A)

SLLC126A.ZIP (8 KB) - IBIS Model
시뮬레이션 모델

SN65LVDS122 IBIS Model PW PKG

SLLC210.ZIP (8 KB) - IBIS Model
시뮬레이션 툴

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TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
시뮬레이션 툴

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TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
사용 설명서: PDF
패키지 CAD 기호, 풋프린트 및 3D 모델
SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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