인터페이스 HDMI, 디스플레이 포트 및 MIPI IC

TFP401A

활성

HSYNC 및 Panelbus™ 통합 회로를 갖춘 165MHz TMDS DVI 리시버/디시리얼라이저

제품 상세 정보

Type Bridge Protocols DVI, HDMI Rating Catalog Speed (max) (Gbpp) 3.96 Supply voltage (V) 3.3 Operating temperature range (°C) 0 to 70
Type Bridge Protocols DVI, HDMI Rating Catalog Speed (max) (Gbpp) 3.96 Supply voltage (V) 3.3 Operating temperature range (°C) 0 to 70
HTQFP (PZP) 100 256 mm² 16 x 16
  • Supports pixel rates up to 165 MHz (including 1080p and WUXGA at 60 Hz)
  • Digital visual interface (DVI) specification compliant (1)
  • True-color, 24-bit/pixel, 16.7M colors at 1 or 2 pixels per clock
  • Laser trimmed internal termination resistors for optimum fixed impedance matching
  • Skew tolerant up to one pixel-clock cycle
  • 4× oversampling
  • Reduced power consumption – 1.8-V core operation with 3.3-V I/Os and supplies (2)
  • Reduced ground bounce using time-staggered pixel outputs
  • Low noise and good power dissipation using TI PowerPAD™ packaging
  • Advanced technology using TI 0.18-µm EPIC-5 CMOS process
  • TFP401A incorporates HSYNC jitter immunity (3)

(1)The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays. The TPF401 and TFP401A are compliant with the DVI Specification Rev. 1.0.

(2)The TFP401/401A has an internal voltage regulator that provides the 1.8-V core power supply from the external 3.3-V supplies.

(3)The TFP401A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.

  • Supports pixel rates up to 165 MHz (including 1080p and WUXGA at 60 Hz)
  • Digital visual interface (DVI) specification compliant (1)
  • True-color, 24-bit/pixel, 16.7M colors at 1 or 2 pixels per clock
  • Laser trimmed internal termination resistors for optimum fixed impedance matching
  • Skew tolerant up to one pixel-clock cycle
  • 4× oversampling
  • Reduced power consumption – 1.8-V core operation with 3.3-V I/Os and supplies (2)
  • Reduced ground bounce using time-staggered pixel outputs
  • Low noise and good power dissipation using TI PowerPAD™ packaging
  • Advanced technology using TI 0.18-µm EPIC-5 CMOS process
  • TFP401A incorporates HSYNC jitter immunity (3)

(1)The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays. The TPF401 and TFP401A are compliant with the DVI Specification Rev. 1.0.

(2)The TFP401/401A has an internal voltage regulator that provides the 1.8-V core power supply from the external 3.3-V supplies.

(3)The TFP401A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.

The Texas Instruments TFP401 and TFP401A are TI PanelBus™ flat-panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP401/401A finds applications in any design requiring high-speed digital interface.

The TFP401 and TFP401A supports display resolutions up to 1080p and WUXGA in 24-bit true-color pixel format. The TFP401 and TFP401A offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time-staggered pixel outputs for reduced ground bounce.

PowerPAD advanced packaging technology results in best-of-class power dissipation, footprint, and ultralow ground inductance.

The TFP401 and TFP401A combines PanelBus circuit innovation with TI’s advanced 0.18-µm EPIC-5 CMOS process technology, along with TI PowerPAD package technology to achieve a reliable, low-powered, low-noise, high-speed digital interface solution.

The Texas Instruments TFP401 and TFP401A are TI PanelBus™ flat-panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP401/401A finds applications in any design requiring high-speed digital interface.

The TFP401 and TFP401A supports display resolutions up to 1080p and WUXGA in 24-bit true-color pixel format. The TFP401 and TFP401A offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time-staggered pixel outputs for reduced ground bounce.

PowerPAD advanced packaging technology results in best-of-class power dissipation, footprint, and ultralow ground inductance.

The TFP401 and TFP401A combines PanelBus circuit innovation with TI’s advanced 0.18-µm EPIC-5 CMOS process technology, along with TI PowerPAD package technology to achieve a reliable, low-powered, low-noise, high-speed digital interface solution.

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기술 자료

star =TI에서 선정한 이 제품의 인기 문서
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7개 모두 보기
유형 직함 날짜
* Data sheet TFP401x TI PanelBus Digital Receiver datasheet (Rev. H) PDF | HTML 2022/03/25
* Errata TFP101(A), TFP201(A), TFP401(A) Errata 2003/11/11
* Errata TFP101/A, TFP201/A, TFP401/A, TFP403 Data Sheet Errata 2003/06/27
Application note TFPxxx FAQ (Rev. A) 2019/05/02
Application note How to Bridge HDMI/DVI to LVDS/OLDI (Rev. C) 2018/06/07
Application note PanelBus TFP401/401A Design Notes 2003/03/18
Application note TFP101/201/401(A) 2Pix/Clk Output Mode 2003/03/18

설계 및 개발

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TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

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HTQFP (PZP) 100 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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