TL16C552A
- IBM PC/ATTM Compatible
- Two TL16C550 ACEs
- Enhanced Bidirectional Printer Port
- 16-Byte FIFOs Reduce CPU Interrupts
- Up to 16-MHz Clock Rate for up to 1-Mbaud Operation
- Transmit, Receive, Line Status, and Data Set Interrupts on Each Channel Independently Controlled
- Individual Modem Control Signals for Each Channel
- Programmable Serial Interface Characteristics for Each Channel:
- 5-, 6-, 7-, or 8-Bit Characters
- Even, Odd, or No Parity Bit Generation and Detection
- 1-, 1-1/2-, or 2-Stop Bit Generation
- 3-State Outputs Provide TTL Drive for the Data and Control Bus on Each Channel
- Hardware and Software Compatible With TL16C452
IBM PC/AT is a trademark of International Business Machines Corporation.
The TL16C552A is an enhanced dual-channel version of the popular TL16C550B asynchronous communications element (ACE). The device serves two serial input/output interfaces simultaneously in microcomputer or microprocessor-based systems. Each channel performs serial-to-parallel conversion on data characters received from peripheral devices or modems and parallel-to-serial conversion on data characters transmitted by the CPU. The complete status of each channel of the dual ACE can be read at any time during functional operation by the CPU. The information obtained includes the type and condition of the transfer operations being performed and the error conditions encountered.
In addition to its dual communications interface capabilities, the TL16C552A provides the user with a bidirectional parallel data port that fully supports the parallel Centronics-type printer interface. The parallel port and the two serial ports provide IBM PC/AT-compatible computers with a single device to serve the three system ports. A programmable baud rate generator that can divide the timing reference clock input by a divisor between 1 and (216 - 1) is included.
The TL16C552A is available in a 68-pin plastic-leaded chip-carrier (FN) package and a 80-pin TQFP (PN) package. The TL16C552AM is available in a 68-pin ceramic quad flat (HV) package.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | Dual Asychronous Communications Element With FIFO datasheet (Rev. D) | 1999/01/21 |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치