TLIN1021A-Q1
- AEC-Q100 (Grade 1) Qualified for automotive applications
- Compliant to LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A and ISO 17987–4 electrical physical layer (EPL) specification
- Compliant to SAE J2602-1 LIN Network for Vehicle Applications
- Functional Safety-Capable
- Wide input operational voltage range:
- VSUP range from 4.5 V to 36 V
- LIN transmit data rate up to 20 kbps
- LIN receive data rate up to 100 kbps
- Operating modes: Normal, Standby and Sleep
- Low-power mode wake-up support with source recognition:
- Remote wake-up over the LIN bus
- Local wake-up via the WAKE pin
- Local wake-up via EN
- Integrated 45-kΩ LIN pull-up resistor
- Control of system-level power using the INH pin
- Power-up/down glitch-free operation on LIN bus and RXD output
- Protection features: ±45-V LIN bus fault tolerant, 42-V load dump support, undervoltage protection on VSUP, TXD dominant state time-out, thermal shutdown, unpowered node or ground disconnection fail-safe at system level
- Junction temperatures from -40°C to 150°C
- Available in 8-pin SOIC, VSON with wettable flanks, and SOT23 packages
The TLIN1021A-Q1 is a local interconnect network (LIN) physical layer transceiver. LIN is a low-speed universal asynchronous receiver transmitter (UART) communication protocol, that supports automotive in-vehicle networking.
The TLIN1021A-Q1 transmitter supports data rates up to 20 kbps. The transceiver controls the state of the LIN bus through the TXD pin and reports the state of the bus on its open-drain RXD output pin. The device has a current-limited wave-shaping driver to reduce electromagnetic emissions (EME).
The TLIN1021A-Q1 is designed to support 12-V applications with a wide input voltage operating range. The device supports low-power sleep mode, as well as wake-up from low-power mode through wake over LIN, the WAKE pin, or the EN pin. The device allows system-level reductions in battery current consumption, by selectively enabling the various power supplies that can be present on a node through the TLIN1021A-Q1 INH output pin.
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기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | TLIN1021A-Q1 Fault-Protected LIN Transceiver with Inhibit and Wake datasheet (Rev. B) | PDF | HTML | 2022/04/01 |
| Functional safety information | TLIN1021A-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA | PDF | HTML | 2020/10/15 | |
| EVM User's guide | TLIN1039 Evaluation Module | PDF | HTML | 2020/04/28 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
| SOT-23-THN (DDF) | 8 | Ultra Librarian |
| VSON (DRB) | 8 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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