TLV840-Q1
Qualified for automotive applications:
- AEC-Q100 qualified with the following results:
- Device temperature grade 1: –40°C to +125°C ambient operating temperature
- Device HBM ESD classification level 2
- Device CDM ESD classification level C7B
Designed for high performance:
- Nano supply current : 120 nA (Typ)
- High accuracy: ±0.5% (Typ)
- Built-in hysteresis (VHYS): 5% (Typ)
- Fixed threshold voltage (VIT-): 0.8 V to 5.4 V
Designed for a wide range of applications:
- Operating voltage range : 0.7 V to 6 V
- Fixed (VIT-) voltage: 0.8 V to 5.4 V in 0.1 V steps
- Programmable reset time delay (tD)
- Min time delay: 40 µs (typ) without capacitor
- Active-low manual reset (MR)
Multiple output topologies / Package type:
- Four output topologies (RESET / RESET):
- TLV840MADL-Q1: open-drain, active-low
- TLV840MAPL-Q1: push-pull, active-low
- TLV840MADH-Q1: open-drain, active-high
- TLV840MAPH-Q1: push-pull, active-high
- Package: SOT23-5 (DBV)
The TLV840-Q1 device is a voltage supervisor or reset IC that can operate at wide input voltage levels from 0.7 V to 6 V while maintaining very low quiescent current across the whole VDD and temperature range. TLV840-Q1 offers the best combination of low power consumption, high accuracy and low propagation delay (tp_HL= 30 µs typical).
Reset output signal is asserted when the voltage at VDD drops below the negative voltage threshold (VIT-). Reset signal is cleared when VDD rise above VIT- plus hysteresis (VHYS) and the reset time delay (tD) expires. Reset time delay can be programmed by connecting a capacitor between the CT pin and ground. For a minimum reset delay time the CT pin can be left floating. The TLV840-Q1, with its manual reset pin (MR), offers program flexibility by forcing the system into a hard reset when the pin is asserted.
Additional features: Low power-on reset voltage (VPOR), built-in glitch immunity protection for VDD, built-in hysteresis, low open-drain output leakage current (Ilkg(OD)). TLV840-Q1 is a perfect voltage monitoring solution for automotive applications and battery-powered / low-power applications.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | TLV840-Q1 Nano-Power Voltage Supervisor with Adjustable Reset Time Delay datasheet (Rev. A) | PDF | HTML | 2021/04/13 |
| Functional safety information | TLV840-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA | PDF | HTML | 2021/04/15 | |
| EVM User's guide | TLV840EVM Voltage Supervisor User's Guide | 2020/02/13 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
TLV840EVM — 조정 가능한 리셋 시간 지연 및 수동 리셋을 지원하는 TLV840 저전압 슈퍼바이저 평가 모듈
The TLV840 evaluation module (EVM) is designed to evaluate the performance of the TLV840 product, which is a 5-pin voltage supervisor and reset IC. TLV840 offers operation up to 6 V, while maintaining low quiescent current of 1.2 µA (max) in addition to 2% maximum accuracy.
TLV840EVM supports (...)
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| SOT-23 (DBV) | 5 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치