TPS51604-Q1
- Qualified for Automotive Applications
- AEC-Q100 Qualified With the Following Results:
- Device Temperature Grade 1: –40°C to 125°C
- Device Human Body Model ESD Classification Level H2
- Device Charged Device Model ESD Classification Level C3B
- Reduced Dead-Time Drive Circuit for Optimized CCM
- Automatic Zero Crossing Detection for Optimized DCM Efficiency
- Multiple Low-Power Modes for Optimized Light-Load Efficiency
- Optimized Signal Path Delays for High-Frequency Operation
- Integrated BST Switch Drive Strength Optimized for Ultrabook FETs
- Optimized for 5-V FET Drive
- Conversion Input Voltage Range (VIN): 4.5 to 28 V
- 2-mm × 2-mm, 8-Pin, WSON Power-Pad Package
The TPS51604-Q1 drivers are optimized for high-frequency CPU VCORE applications. Advanced features such as reduced dead-time drive and auto zero crossing are used to optimize efficiency over the entire load range.
The SKIP pin provides immediate CCM operation to support controlled management of the output voltage. In addition, the TPS51604-Q1 supports two low-power modes. With the PWM input in 3-state, quiescent current is reduced to 130 µA, with immediate response. When SKIP is held at 3-state, the current is reduced to 8 µA (typically 20 µs is required to resume switching). Paired with the appropriate TI controller, the drivers deliver an exceptionally high performance power supply system.
The TPS51604-Q1 device is packaged in a space saving, thermally-enhanced 8-pin, 2-mm x 2-mm WSON package and operates from –40°C to 125°C.
For all available packages, see the orderable addendum at the end of the data sheet.기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | TPS51604-Q1 Synchronous Buck FET Driver for High-Frequency CPU Core Power in Automotive Applications datasheet (Rev. A) | PDF | HTML | 2014/08/04 |
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 2020/02/28 | ||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 2020/02/28 | ||
| More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 2018/10/29 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| WSON (DSG) | 8 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치