TPS51622
- Intel© Serial VID (SVID) Compliant
- 1- or 2-Phase Operation
- Full VR12.6 Mobile Feature Set Including Digital Current
Monitor, PS3 and PS4 Operation - 8-Bit DAC with 0.50-V to 2.30-V Output Range
- Optimized Efficiency at Light and Heavy Loads
- 8 Independent Levels of Overshoot Reduction (OSR)
and Undershoot Reduction (USR) - Driverless Configuration for Efficient High-Frequency
Switching - Supports Discrete, Power Block, PowerStage or
DrMOS MOSFET Implementations - Accurate, Adjustable Voltage Positioning
- 300-kHz to 1-MHz Frequency Selections
- Patented AutoBalance Phase Balancing
- Selectable 8-level Current Limit
- 4.5-V to 28-V Conversion Voltage Range
- Small, 4 × 4, 32-Pin, QFN PowerPad Package
The TPS51622A is a driverless, fully SVID compliant, VR12.6 step-down controller. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS51622A also supports single-phase operation in CCM or DCM for light-load efficiency. The TPS51622A integrates the full complement of VR12.6 I/O features including VR_READY (PGOOD), ALERT and VR_HOT. The SVID interface address allows programming from 0 to 7. In PS4, the quiescent power consumption of controller is typical 0.25 mW. Adjustable control of VCPU slew rate and voltage positioning round out the VR12.6 features. Paired with the new TPS51604 FET gate driver, the solution delivers exceptionally high speed and low switching loss. The TPS51622A works with selected TI Power Stage™ products for optimum efficiency as well as DrMOS products.
The TPS51622A package is a space saving, thermally enhanced 32-pin QFN that operates from –40°C to 105°C.
중요 참고:
자세한 데이터시트 및 기타 설계 지원 툴은 IMVP@list.ti.com으로 문의해 주시기 바랍니다.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | 2-Phase, D-CAP+™ Step-Down Controller for VR12.6 Vcpu datasheet (Rev. A) | 2013/07/17 | |
Technical article | How to reduce acoustic noise of MLCCs in power applications | PDF | HTML | 2016/08/09 |
설계 및 개발
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패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
VQFN (RSM) | 32 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치