TPS51916
- Synchronous Buck Controller (VDDQ)
- Conversion Voltage Range: 3 V to 28 V
- Output Voltage Range: 0.7 V to 1.8 V
- 0.8% VREF Accuracy
- Selectable Control Architecture
- D-CAP™ Mode for Fast Transient Response
- D-CAP2™ Mode for Ceramic Output Capacitors
- Selectable 300 kHz, 400 kHz, 500 kHz, or 670 kHz Switching Frequencies
- Optimized Efficiency at Light and Heavy Loads with Auto-skip Function
- Supports Soft-Off in S4 and S5 States
- OCL/OVP/UVP/UVLO Protections
- Powergood Output
- 2-A LDO(VTT), Buffered Reference(VTTREF)
- 2-A (Peak) Sink and Source Current
- Buffered, Low Noise, 10-mA VTTREF Output
- 0.8% VTTREF, 20-mV VTT Accuracy
- Supports High-Z (S3) and Soft-Off (S4, S5)
- Thermal Shutdown
- 20-Pin, 3 mm × 3 mm, QFN Package
- Create a WEBENCH Design
The TPS51916 device provides a complete power supply for DDR2, DDR3, DDR3L, and DDR4 memory systems in the lowest total cost and minimum space. It integrates a synchronous buck regulator controller (VDDQ) with a 2-A sink and 2-A source tracking LDO (VTT) and buffered low noise reference (VTTREF).
The device employs D-CAP™ mode coupled with 300 kHz or 400 kHz frequencies for ease-of-use and fast transient response or D-CAP2™ mode coupled with higher 500 kHz or 670 kHz frequencies to support ceramic output capacitor without an external compensation circuit. The VTTREF tracks VDDQ/2 within excellent 0.8% accuracy. The VTT, which provides 2-A sink and 2-A source peak current capabilities, requires only 10-µF of ceramic capacitance. A dedicated LDO supply input is available.
The device also provides excellent power supply performance. It supports flexible power state control, placing VTT at high-Z in S3 and discharging VDDQ, VTT and VTTREF (soft-off) in S4 or S5 state. Programmable OCL with low-side MOSFET RDS(on) sensing, OVP, UVP, UVLO and thermal shutdown protections are also available.
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기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | TPS51916 Complete DDR2, DDR3, DDR3L and DDR4 Memory Power Solution Synchronous Buck Controller, 2-A LDO, Buffered Reference datasheet (Rev. F) | PDF | HTML | 2018/12/19 |
Selection guide | Power Management Guide 2018 (Rev. R) | 2018/06/25 | ||
More literature | Computing DDR DC-DC Power Solutions | 2012/08/22 | ||
User guide | TPS51916EVM-746 User's Guide | 2011/08/19 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
TPS51916EVM-746 — TPS51916 DDR2, DDR3 및 DDR3L 메모리 전원 솔루션 동기 벅 컨트롤러용 평가 모듈
TPS51916 TINA-TI Transient Reference Design
TIDA-00020 — Intel IMVP7 2세대 코어 모바일(코어 i7) 전원 관리 레퍼런스 디자인
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
WQFN (RUK) | 20 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.