홈 전원 관리 멀티 채널 IC(PMIC)
홈
전원 관리
멀티 채널 IC(PMIC)

TPS53317

활성

DDR 메모리 터미네이터용 낮은 입력 전압, 6A 동기형 스텝다운 SWIFT™ 컨버터

지금 주문
데이터 시트

TPS53317

활성
데이터 시트 지금 주문

제품 상세 정보

Vin (min) (V) 1 Vin (max) (V) 6 Vout (min) (V) -0.3 Vout (max) (V) 3.6 Features Complete Solution Iq (typ) (mA) 0.32 Rating Catalog Operating temperature range (°C) -40 to 85 Product type DDR DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3
Vin (min) (V) 1 Vin (max) (V) 6 Vout (min) (V) -0.3 Vout (max) (V) 3.6 Features Complete Solution Iq (typ) (mA) 0.32 Rating Catalog Operating temperature range (°C) -40 to 85 Product type DDR DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3
VQFN (RGB) 20 14 mm² 4 x 3.5
  • TI proprietary Integrated MOSFET and Packaging Technology
  • Supports DDR Memory Termination with up to 6-A Continuous Output Source or Sink Current
  • External Tracking
  • Minimum External Components Count
  • to 6-V Conversion Voltage
  • D-CAP+ Mode Architecture
  • Supports All MLCC Output Capacitors and SP/POSCAP
  • Selectable SKIP Mode or Forced CCM
  • Optimized Efficiency at Light and Heavy Loads
  • Selectable 600-kHz or 1-MHz Switching Frequency
  • Selectable Overcurrent Limit (OCL)
  • Overvoltage, Over-Temperature and Hiccup Undervoltage Protection
  • Adjustable Output Voltage from to 2 V
  • 3.5 mm × 4 mm, 20-Pin VQFN Package
  • TI proprietary Integrated MOSFET and Packaging Technology
  • Supports DDR Memory Termination with up to 6-A Continuous Output Source or Sink Current
  • External Tracking
  • Minimum External Components Count
  • to 6-V Conversion Voltage
  • D-CAP+ Mode Architecture
  • Supports All MLCC Output Capacitors and SP/POSCAP
  • Selectable SKIP Mode or Forced CCM
  • Optimized Efficiency at Light and Heavy Loads
  • Selectable 600-kHz or 1-MHz Switching Frequency
  • Selectable Overcurrent Limit (OCL)
  • Overvoltage, Over-Temperature and Hiccup Undervoltage Protection
  • Adjustable Output Voltage from to 2 V
  • 3.5 mm × 4 mm, 20-Pin VQFN Package

The device is a FET-integrated synchronous buck regulator designed mainly for DDR termination. It can provide a regulated output at ½ VDDQ with bothsink and source capability. The device employs D-CAP+ mode operation that provides ease of use, low external componentcount and fast transient response. The device can also be used for other point-of-load (POL)regulation applications requiring up to 6 A. In addition, the device supports full, 6-A, outputsinking current capability with tight voltage regulation.

The device features two switching frequency settings (600 kHz and 1 MHz), integrateddroop support, external tracking capability, pre-bias startup, output soft discharge, integratedbootstrap switch, power good function, V5IN pin UVLO protection, and supports both ceramic andSP/POSCAP capacitors. It supports input voltages up to 6.0 V, and output voltages adjustable from to 2.0 V.

The device is available in the 3.5 mm × 4 mm, 20-pin, VQFNpackage (Green RoHs compliant and Pb free) with TI proprietary Integrated MOSFET and packaging technology and is specified from –40°C to 85°C.

For all available packages, see the orderable addendum at the end of the data sheet.

The device is a FET-integrated synchronous buck regulator designed mainly for DDR termination. It can provide a regulated output at ½ VDDQ with bothsink and source capability. The device employs D-CAP+ mode operation that provides ease of use, low external componentcount and fast transient response. The device can also be used for other point-of-load (POL)regulation applications requiring up to 6 A. In addition, the device supports full, 6-A, outputsinking current capability with tight voltage regulation.

The device features two switching frequency settings (600 kHz and 1 MHz), integrateddroop support, external tracking capability, pre-bias startup, output soft discharge, integratedbootstrap switch, power good function, V5IN pin UVLO protection, and supports both ceramic andSP/POSCAP capacitors. It supports input voltages up to 6.0 V, and output voltages adjustable from to 2.0 V.

The device is available in the 3.5 mm × 4 mm, 20-pin, VQFNpackage (Green RoHs compliant and Pb free) with TI proprietary Integrated MOSFET and packaging technology and is specified from –40°C to 85°C.

For all available packages, see the orderable addendum at the end of the data sheet.
filter 기타 멀티 채널 IC(PMIC) 찾기
다운로드 스크립트와 함께 비디오 보기 동영상

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
4개 모두 보기
유형 직함 날짜
* Data sheet TPS53317 6-A Output, D-CAP+ Mode, Synchronous Step-Down, Integrated-FET Converter for DDR Memory Termination datasheet (Rev. D) PDF | HTML 2015/07/10
Selection guide SWIFT DC/DC Converters Selector Guide (Rev. G) 2019/02/06
Selection guide Power Management Guide 2018 (Rev. R) 2018/06/25
EVM User's guide Using the TPS53317EVM-750 D-CAP+™ Mode Synchronous Step-Down Integrated FETs Con 2011/09/06

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

시뮬레이션 모델

TPS53317 IBIS Model

SLUM347.ZIP (10 KB) - IBIS Model
다운로드
시뮬레이션 모델

TPS53317 PSpice Transient Model

SLUM370.ZIP (64 KB) - PSpice Model
다운로드
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
VQFN (RGB) 20 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

포럼 주제 모두 보기(영문)

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상