전원 관리 선형 및 저손실(LDO) 레귤레이터

TPS753

활성

낮은 IQ 및 지연을 포함한 리셋을 지원하는 1.5A, 초저 손실 전압 레귤레이터

이 제품의 최신 버전이 있습니다

open-in-new 대안 비교
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능
TPS7A52 활성 2A, 낮은 VIN(1.1V), 저잡음, 고정밀, 초저손실(LDO) 전압 레귤레이터 Lower noise performance in smaller enhanced QFN package

제품 상세 정보

Output options Adjustable Output, Fixed Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.8, 2.5, 3.3 Rating Catalog Noise (µVrms) 60 PSRR at 100 KHz (dB) 17 Iq (typ) (mA) 0.075 Thermal resistance θJA (°C/W) 43 Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 160 Operating temperature range (°C) -40 to 125
Output options Adjustable Output, Fixed Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.8, 2.5, 3.3 Rating Catalog Noise (µVrms) 60 PSRR at 100 KHz (dB) 17 Iq (typ) (mA) 0.075 Thermal resistance θJA (°C/W) 43 Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 160 Operating temperature range (°C) -40 to 125
HTSSOP (PWP) 20 41.6 mm² 6.5 x 6.4
  • 1.5-A Low-Dropout Voltage Regulator
  • Available in 1.5 V, 1.8 V, 2.5 V, and 3.3 V Fixed Output and Adjustable Versions
  • Open Drain Power-Good (PG) Status Output (TPS751xxQ)
  • Open Drain Power-On Reset With 100ms Delay (TPS753xxQ)
  • Dropout Voltage Typically 160 mV at 1.5 A (TPS75133Q)
  • Ultralow 75-µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 20-Pin TSSOP PowerPAD™ (PWP) Package
  • Thermal Shutdown Protection
  • APPLICATIONS
    • Telecom
    • Servers
    • DSP, FPGA Supplies

PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

  • 1.5-A Low-Dropout Voltage Regulator
  • Available in 1.5 V, 1.8 V, 2.5 V, and 3.3 V Fixed Output and Adjustable Versions
  • Open Drain Power-Good (PG) Status Output (TPS751xxQ)
  • Open Drain Power-On Reset With 100ms Delay (TPS753xxQ)
  • Dropout Voltage Typically 160 mV at 1.5 A (TPS75133Q)
  • Ultralow 75-µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 20-Pin TSSOP PowerPAD™ (PWP) Package
  • Thermal Shutdown Protection
  • APPLICATIONS
    • Telecom
    • Servers
    • DSP, FPGA Supplies

PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

The TPS753xxQ and TPS751xxQ devices are low-dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. These devices are designed to have fast transient response for larger load current changes.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, because the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.

The device is enabled when EN is connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ = +25°C.

For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output for use with a power-on reset or a low-battery indicator.

The RESET (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET goes to a high-impedance state after a 100-ms delay. RESET goes to a logic-low state when the regulated output voltage is pulled below 95% (that is, during an overload condition) of its regulated voltage.

The TPS751xxQ and TPS753xxQ are offered in 1.5 V, 1.8 V, 2.5 V and 3.3 V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in a 20-pin TSSOP (PWP) package.

The TPS753xxQ and TPS751xxQ devices are low-dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. These devices are designed to have fast transient response for larger load current changes.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, because the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.

The device is enabled when EN is connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ = +25°C.

For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output for use with a power-on reset or a low-battery indicator.

The RESET (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET goes to a high-impedance state after a 100-ms delay. RESET goes to a logic-low state when the regulated output voltage is pulled below 95% (that is, during an overload condition) of its regulated voltage.

The TPS751xxQ and TPS753xxQ are offered in 1.5 V, 1.8 V, 2.5 V and 3.3 V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in a 20-pin TSSOP (PWP) package.

다운로드

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
1개 모두 보기
유형 직함 날짜
* Data sheet Fast-Transient-Response 1.5-A Low-Dropout Voltage Regulators datasheet (Rev. C) 2007/10/19

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​