전원 관리 선형 및 저손실(LDO) 레귤레이터

TPS7A20U

활성

75mA, 초저잡음 저 IQ 높은 PSRR 저손실(LDO) 선형 레귤레이터

제품 상세 정보

Output options Fixed Output Iout (max) (A) 0.075 Vin (max) (V) 6 Vin (min) (V) 1.6 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Fixed output options (V) 1.8, 2.5, 3, 3.1, 3.3, 4.1 Rating Catalog Noise (µVrms) 7 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 0.0065 Thermal resistance θJA (°C/W) 201.4 Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Output discharge Accuracy (%) 1.5 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 0.075 Vin (max) (V) 6 Vin (min) (V) 1.6 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Fixed output options (V) 1.8, 2.5, 3, 3.1, 3.3, 4.1 Rating Catalog Noise (µVrms) 7 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 0.0065 Thermal resistance θJA (°C/W) 201.4 Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Output discharge Accuracy (%) 1.5 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
DSBGA (YCK) 4 0.379456 mm² 0.616 x 0.616
  • Low output voltage noise: 7µVRMS
    • No noise-bypass capacitor required
  • High PSRR: 89dB at 1kHz
  • Very low IQ: 6.5µA
  • Input voltage range: 1.6V to 6.0V
  • Output voltage range: 0.8V to 5.5V
  • Output voltage tolerance: ±1.5% (max)
  • Very low dropout:
    • 95mV (max) at 75mA (VOUT = 1.5V to 5.5V)
  • Low inrush current
  • Smart enable pulldown
  • Stable with 1µF minimum ceramic output capacitor
  • 0.616mm × 0.616mm DSBGA package
  • Low output voltage noise: 7µVRMS
    • No noise-bypass capacitor required
  • High PSRR: 89dB at 1kHz
  • Very low IQ: 6.5µA
  • Input voltage range: 1.6V to 6.0V
  • Output voltage range: 0.8V to 5.5V
  • Output voltage tolerance: ±1.5% (max)
  • Very low dropout:
    • 95mV (max) at 75mA (VOUT = 1.5V to 5.5V)
  • Low inrush current
  • Smart enable pulldown
  • Stable with 1µF minimum ceramic output capacitor
  • 0.616mm × 0.616mm DSBGA package

The TPS7A20U is an ultra-small, low-dropout (LDO) linear regulator that sources 75mA of output current. The TPS7A20U is designed to provide low noise, high PSRR, and excellent load and line transient performance. This performance meets the requirements of RF and other sensitive analog circuits. Using innovative design techniques, the TPS7A20U offers ultra-low noise performance without the addition of a noise bypass capacitor. The TPS7A20U also provides the advantage of low quiescent current, which is designed for battery-powered applications. With a 1.6V to 6.0V input voltage range and a 0.8V to 5.5V output range, the TPS7A20U is applicable for a wide variety of applications. The device uses a precision reference circuit to provide a maximum accuracy of 1.5% over load, line, and temperature variations.

The TPS7A20U features an internal soft-start to lower the inrush current, thus minimizing the input voltage drop during start-up. The device is stable with small ceramic capacitors, allowing for a small overall solution size.

The TPS7A20U has a smart enable input circuit with an internally controlled pulldown resistor that keeps the LDO disabled. The LDO remains disabled even when the EN pin is left floating and helps eliminate the external components used to pulldown the EN pin.

The TPS7A20U is an ultra-small, low-dropout (LDO) linear regulator that sources 75mA of output current. The TPS7A20U is designed to provide low noise, high PSRR, and excellent load and line transient performance. This performance meets the requirements of RF and other sensitive analog circuits. Using innovative design techniques, the TPS7A20U offers ultra-low noise performance without the addition of a noise bypass capacitor. The TPS7A20U also provides the advantage of low quiescent current, which is designed for battery-powered applications. With a 1.6V to 6.0V input voltage range and a 0.8V to 5.5V output range, the TPS7A20U is applicable for a wide variety of applications. The device uses a precision reference circuit to provide a maximum accuracy of 1.5% over load, line, and temperature variations.

The TPS7A20U features an internal soft-start to lower the inrush current, thus minimizing the input voltage drop during start-up. The device is stable with small ceramic capacitors, allowing for a small overall solution size.

The TPS7A20U has a smart enable input circuit with an internally controlled pulldown resistor that keeps the LDO disabled. The LDO remains disabled even when the EN pin is left floating and helps eliminate the external components used to pulldown the EN pin.

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기술 자료

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유형 직함 날짜
* Data sheet TPS7A20U 75mA, Low-Noise, Low-IQ, High-PSRR LDO datasheet (Rev. A) PDF | HTML 2024/09/25

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

MULTIPKGLDOEVM-823 — DBV, DRB, DRV 및 DQN 패키지용 범용 LDO 선형 전압 레귤레이터 평가 모듈

MULTIPKGLDOEVM-823 평가 모듈(EVM)을 사용하면 회로 애플리케이션에서 사용할 수 있는 몇 가지 일반적인 선형 레귤레이터 패키지의 작동과 성능을 평가할 수 있습니다. 이 특정 EVM 구성에는 사용자를 위한 DRB, DRV, DQN 및 DBV 풋프린트가 있으며 저손실(LDO) 레귤레이터를 납땜하고 평가할 수 있습니다.

사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

TPS7A20U PSPICE Model

SBVMA05.ZIP (97 KB) - PSpice Model
패키지 CAD 기호, 풋프린트 및 3D 모델
DSBGA (YCK) 4 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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