TPS7A49
- Input Voltage Range: 3 V to 36 V
- Noise:
- 12.7 µVRMS (20 Hz to 20 kHz)
- 15.4 µVRMS (10 Hz to 100 kHz)
- Power-Supply Ripple Rejection:
- 72 dB (120 Hz)
- ≥ 52 dB (10 Hz to 400 kHz)
- Adjustable Output: 1.194 V to 33 V
- Output Current: 150 mA
- Dropout Voltage: 260 mV at 100 mA
- Stable with Ceramic Capacitors ≥ 2.2 µF
- CMOS Logic-Level-Compatible Enable Pin
- Fixed Current-Limit and Thermal Shutdown Protection
- Packages: 8-Pin HVSSOP PowerPAD™ and
3-mm × 3-mm VSON - Operating Temperature Range:
–40°C to 125°C
The TPS7A49 series of devices are positive, high-voltage (36 V), ultralow-noise (15.4 µVRMS, 72-dB PSRR) linear regulators that can source a 150-mA load.
These linear regulators include a CMOS logic-level-compatible enable pin and capacitor-programmable soft-start function that allows for customized power-management schemes. Other available features include built-in current limit and thermal shutdown protection to safeguard the device and system during fault conditions.
The TPS7A49 family is designed using bipolar technology, and is ideal for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This design makes the device an excellent choice to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.
In addition, the TPS7A49 family of linear regulators is suitable for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversion, maximum system performance is provided in sensitive instrumentation, test and measurement, audio, and RF applications.
For applications where positive and negative high-performance rails are required, consider TI’s TPS7A30xx family of negative high-voltage, ultralow-noise linear regulators as well.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | TPS7A49 36-V, 150-mA, Ultralow-Noise, Positive Linear Regulator datasheet (Rev. E) | PDF | HTML | 2015/05/26 |
| White paper | Demystifying LDO Turn-On (startup) Time | PDF | HTML | 2024/10/05 | |
| White paper | Parallel LDO Architecture Design Using Ballast Resistors | PDF | HTML | 2022/12/14 | |
| White paper | Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast | PDF | HTML | 2022/12/13 | |
| Application note | A Topical Index of TI LDO Application Notes (Rev. F) | 2019/06/27 | ||
| Application note | Accurate Thermal Calculations on the Back of a Napkin | 2019/06/03 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018/06/25 | ||
| Selection guide | Low Dropout Regulators Quick Reference Guide (Rev. P) | 2018/03/21 | ||
| EVM User's guide | TPS7A30-49EVM-567 User's Guide | 2010/08/27 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
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많은 TI 레퍼런스 설계에는 TPS7A49이(가) 포함됩니다.
레퍼런스 디자인 선택 툴을 사용하여 애플리케이션 및 매개 변수에 가장 적합한 설계를 검토하고 식별할 수 있습니다.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| HVSSOP (DGN) | 8 | Ultra Librarian |
| VSON (DRB) | 8 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.