BUF802
- Large-signal bandwidth (1 VPP): 3.1 GHz
- Slew rate: 7000 V/µs
- Input voltage noise: 2.3 nV/√Hz
- 1% settling time: 0.7 ns
- Input-impedance: 50 GΩ || 2.4 pF
- Capable of driving 50 Ω load
- Adjustable quiescent current for power and performance trade-off
- Integrated input and output clamp with fast overdrive recovery
- Voltage supply: ±4.5 V to ±6.5 V
The BUF802 device is an open-loop, unity gain buffer with a JFET-input stage that offers low-noise, high-impedance buffering for data acquisition system (DAQ) front-ends. The BUF802 supports DC to 3.1 GHz of bandwidth while offering excellent distortion and noise performance across the frequency range.
The BUF802 may be used in a composite loop with a precision amplifier in applications where higher precision performance is required. The BUF802 uses an innovative architecture to simplify the design of high-precision, wide-bandwidth composite loops.
The BUF802 features an adjustable quiescent current pin, which enables designers to trade bandwidth and distortion for a lower quiescent current, thus making the part suitable across a wide-frequency range. The BUF802 has integrated input and output clamps to protect the device and its subsequent signal-chain from overdrive voltages.
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技術文件
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檢視所有 6 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | BUF802 Wide-Bandwidth, 2.3 nV/√Hz, High-Input Impedance Buffer datasheet (Rev. C) | PDF | HTML | 2022年 3月 18日 |
| Product overview | Pairing High-Speed JFET Amplifiers With Hi-Z DAQ Systems | PDF | HTML | 2024年 4月 8日 | |
| Application note | Choosing an Amplifier for Wide Bandwidth, High-Impedance, Data Acquisition AFEs | PDF | HTML | 2023年 3月 2日 | |
| Application brief | How to Tune the S-Parameters of Your Analog Front-End Signal Chain | PDF | HTML | 2022年 2月 25日 | |
| EVM User's guide | BUF802RGTEVM User's Guide (Rev. A) | PDF | HTML | 2022年 2月 4日 | |
| Technical article | Achieving high-DC precision and wide large signal bandwidth with Hi-Z buffers | PDF | HTML | 2022年 1月 18日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
BUF802RGTEVM — BUF802 評估模組，採用 RGT 封裝的高速、寬頻、2.3-nV/√Hz、輸入緩衝器
The BUF802RGTEVM is designed to easily demonstrate the functionality and versatility of the buffer. The EVM features two separate circuit configurations: a composite loop with a precision amplifier and a standalone BUF802 circuit. It can be used with split or single supplies, and includes SMA (...)
計算工具
ANALOG-ENGINEER-CALC — 類比工程師計算機
The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
計算工具
VOLT-DIVIDER-CALC — Voltage divider calculation tool
The voltage divider calculation tool (VOLT-DIVIDER-CALC) quickly determines a set of resistors for a voltage divider. This KnowledgeBase JavaScript utility can be used to find a set of resistors for a voltage divider to achieve the desired output voltage. VOLT-DIVIDER-CALC can also be used to (...)
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計
TIDA-01022 — 適用於 DSO、雷達和 5G 無線測試系統的靈活 3.2-GSPS 多通道 AFE 參考設計
This high speed multi-channel data capture reference design enables optimum system performance. System designers needs to consider critical design parameters like clock jitter and skew for high speed multi-channel clock generation, which affects overall system SNR, SFDR, channel to channel skew (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGT) | 16 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點