現在提供此產品的更新版本
具備升級功能，可直接投入使用替代所比較的產品
LF356
- Advantages
- Replace Expensive Hybrid and Module FET
Op Amps - Rugged JFETs Allow Blow-Out Free Handling
Compared With MOSFET Input Devices - Excellent for Low Noise Applications Using
Either High or Low Source Impedance–Very
Low 1/f Corner - Offset Adjust Does Not Degrade Drift or
Common-Mode Rejection as in Most
Monolithic Amplifiers - New Output Stage Allows Use of Large
Capacitive Loads (5,000 pF) Without Stability
Problems - Internal Compensation and Large Differential
Input Voltage Capability
- Replace Expensive Hybrid and Module FET
- Common Features
- Low Input Bias Current: 30 pA
- Low Input Offset Current: 3 pA
- High Input Impedance: 1012 Ω
- Low Input Noise Current: 0.01 pA/√Hz
- High Common-Mode Rejection Ratio: 100 dB
- Large DC Voltage Gain: 106 dB
- Uncommon Features
- Extremely Fast Settling Time to 0.01%:
- 4 µs for the LFx55 devices
- 1.5 µs for the LFx56
- 1.5 µs for the LFx57 (AV = 5)
- Fast Slew Rate:
- 5 V/µs for the LFx55
- 12 V/µs for the LFx56
- 50 V/µs for the LFx57 (AV = 5)
- Wide Gain Bandwidth:
- 2.5 MHz for the LFx55 devices
- 5 MHz for the LFx56
- 20 MHz for the LFx57 (AV = 5)
- Low Input Noise Voltage:
- 20 nV/√Hz for the LFx55
- 12 nV/√Hz for the LFx56
- 12 nV/√Hz for the LFx57 (AV = 5)
- Extremely Fast Settling Time to 0.01%:
The LFx5x devices are the first monolithic JFET input operational amplifiers to incorporate well-matched, high-voltage JFETs on the same chip with standard bipolar transistors (BI-FET™ Technology). These amplifiers feature low input bias and offset currents/low offset voltage and offset voltage drift, coupled with offset adjust, which does not degrade drift or common-mode rejection. The devices are also designed for high slew rate, wide bandwidth, extremely fast settling time, low voltage and current noise and a low 1/f noise corner.
技術文件
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檢視所有 11 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | LFx5x JFET Input Operational Amplifiers datasheet (Rev. D) | PDF | HTML | 2015年 11月 30日 |
| E-book | The Signal e-book: A compendium of blog posts on op amp design topics | 2017年 3月 28日 | ||
| Application note | AN-272 Op Amp Booster Designs (Rev. B) | 2013年 4月 23日 | ||
| Application note | AN-263 Sine Wave Generation Techniques (Rev. C) | 2013年 4月 22日 | ||
| Application note | Effect of Heavy Loads on Accuracy and Linearity of Op Amp Circuits (Rev. B) | 2013年 4月 22日 | ||
| Application note | Data Acq Using ADC0816 & ADC0817 8-Bit ADC w/On-Chip 16 Chan Multiplexr | 2004年 5月 10日 | ||
| Application note | AN-293 Control Applications of CMOS DACs | 2004年 5月 10日 | ||
| Application note | AN-253 LH0024 and LH0032 High Speed Op Amp Applications | 2004年 5月 2日 | ||
| Application note | AN-275 CMOS D/A Converters Match Most Microprocessors | 2004年 5月 2日 | ||
| Application note | AN-447 Protection Schemes for BI-FET Amplifiers and Switches | 2004年 5月 2日 | ||
| Application note | Get Fast Stable Response From Improved Unity-Gain Followers | 2002年 10月 2日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
DIP-ADAPTER-EVM — DIP 轉接器評估模組
Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.
The (...)
使用指南: PDF
計算工具
ANALOG-ENGINEER-CALC — 類比工程師計算機
The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
設計工具
CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器
此設計可反轉輸入訊號 VIN，並使用 1000 V/V 或 60 dB 訊號增益。具有 T 回饋網路的反相放大器可在沒有較小 R4 值或超大回饋電阻器值的情況下獲得高增益。
設計工具
CIRCUIT060074 — 具有比較器電路的高壓側電流感測
此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器，若負載電流上升到 1 A 以上，便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時，比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時，讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器，為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用，建議使用具推挽輸出的比較器。
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| PDIP (P) | 8 | Ultra Librarian |
| SOIC (D) | 8 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點