LF356-MIL

現行

軍用級、單路、30-V、5-MHz、FET 輸入運算放大器

產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Rail-to-rail In to V+ GBW (typ) (MHz) 5 Slew rate (typ) (V/µs) 12 Vos (offset voltage at 25°C) (max) (mV) 2 Iq per channel (typ) (mA) 5 Vn at 1 kHz (typ) (nV√Hz) 12 Rating Military Operating temperature range (°C) -40 to 85 Offset drift (typ) (µV/°C) 3 CMRR (typ) (dB) 100 Iout (typ) (A) 0.025 Architecture FET
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Rail-to-rail In to V+ GBW (typ) (MHz) 5 Slew rate (typ) (V/µs) 12 Vos (offset voltage at 25°C) (max) (mV) 2 Iq per channel (typ) (mA) 5 Vn at 1 kHz (typ) (nV√Hz) 12 Rating Military Operating temperature range (°C) -40 to 85 Offset drift (typ) (µV/°C) 3 CMRR (typ) (dB) 100 Iout (typ) (A) 0.025 Architecture FET
TO-CAN (LMC) 8 80.2816 mm² 8.96 x 8.96 WAFERSALE (YS) See data sheet
  • Advantages
    • Replace Expensive Hybrid and Module FET Op Amps
    • Rugged JFETs Allow Blow-Out Free Handling Compared With MOSFET Input Devices
    • Excellent for Low Noise Applications Using Either High or Low Source Impedance—Very Low 1/f Corner
    • Offset Adjust Does Not Degrade Drift or Common-Mode Rejection as in Most Monolithic Amplifiers
    • New Output Stage Allows Use of Large Capacitive Loads (5,000 pF) Without Stability Problems
    • Internal Compensation and Large Differential Input Voltage Capability
  • Common Features
    • Low Input Bias Current: 30 pA
    • Low Input Offset Current: 3 pA
    • High Input Impedance: 1012 Ω
    • Low Input Noise Current: 0.01 pA/√Hz
    • High Common-Mode Rejection Ratio: 100 dB
    • Large DC Voltage Gain: 106 dB
  • Uncommon Features
    • Extremely Fast Settling Time to 0.01%: 1.5 µs
    • Fast Slew Rate: 12 V/µs
    • Wide Gain Bandwidth: 5 MHz
    • Low Input Noise Voltage: 12 nV/√Hz
  • Advantages
    • Replace Expensive Hybrid and Module FET Op Amps
    • Rugged JFETs Allow Blow-Out Free Handling Compared With MOSFET Input Devices
    • Excellent for Low Noise Applications Using Either High or Low Source Impedance—Very Low 1/f Corner
    • Offset Adjust Does Not Degrade Drift or Common-Mode Rejection as in Most Monolithic Amplifiers
    • New Output Stage Allows Use of Large Capacitive Loads (5,000 pF) Without Stability Problems
    • Internal Compensation and Large Differential Input Voltage Capability
  • Common Features
    • Low Input Bias Current: 30 pA
    • Low Input Offset Current: 3 pA
    • High Input Impedance: 1012 Ω
    • Low Input Noise Current: 0.01 pA/√Hz
    • High Common-Mode Rejection Ratio: 100 dB
    • Large DC Voltage Gain: 106 dB
  • Uncommon Features
    • Extremely Fast Settling Time to 0.01%: 1.5 µs
    • Fast Slew Rate: 12 V/µs
    • Wide Gain Bandwidth: 5 MHz
    • Low Input Noise Voltage: 12 nV/√Hz

The LF356-MIL device are the first monolithic JFET input operational amplifiers to incorporate well-matched, high-voltage JFETs on the same chip with standard bipolar transistors (BI-FET™ Technology). These amplifiers feature low input bias and offset currents/low offset voltage and offset voltage drift, coupled with offset adjust, which does not degrade drift or common-mode rejection. The devices are also designed for high slew rate, wide bandwidth, extremely fast settling time, low voltage and current noise and a low 1/f noise corner.

The LF356-MIL device are the first monolithic JFET input operational amplifiers to incorporate well-matched, high-voltage JFETs on the same chip with standard bipolar transistors (BI-FET™ Technology). These amplifiers feature low input bias and offset currents/low offset voltage and offset voltage drift, coupled with offset adjust, which does not degrade drift or common-mode rejection. The devices are also designed for high slew rate, wide bandwidth, extremely fast settling time, low voltage and current noise and a low 1/f noise corner.

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* Data sheet LF356-MIL JFET Input Operational Amplifier datasheet PDF | HTML 2017年 6月 21日

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  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
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