LF412-N
- Internally Trimmed Offset Voltage: 1 mV (Max)
- Input Offset Voltage Drift: 7 µV/°C (Typ)
- Low Input Bias Current: 50 pA
- Low Input Noise Current: 0.01 pA / √Hz
- Wide Gain Bandwidth: 3 MHz (Min)
- High Slew Rate: 10V/µs (Min)
- Low Supply Current: 1.8 mA/Amplifier
- High Input Impedance: 1012Ω
- Low Total Harmonic Distortion: ≤0.02%
- Low 1/f Noise Corner: 50 Hz
- Fast Settling Time to 0.01%: 2 µs
These devices are low cost, high speed, JFET input operational amplifiers with very low input offset voltage and input offset voltage drift. They require low supply current yet maintain a large gain bandwidth product and fast slew rate. In addition, well matched high voltage JFET input devices provide very low input bias and offset currents. The LF412-N dual is pin compatible with the LM1558, allowing designers to immediately upgrade the overall performance of existing designs.
These amplifiers may be used in applications such as high speed integrators, fast D/A converters, sample and hold circuits and many other circuits requiring low input offset voltage and drift, low input bias current, high input impedance, high slew rate and wide bandwidth.
技術文件
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檢視所有 6 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | LF412-N Low Offset, Low Drift Dual JFET Input Operational Amplifier datasheet (Rev. F) | PDF | HTML | 2014年 10月 27日 |
| E-book | The Signal e-book: A compendium of blog posts on op amp design topics | 2017年 3月 28日 | ||
| Application note | AN-301 Signal Conditioning for Sophisticated Transducers (Rev. B) | 2013年 5月 6日 | ||
| Application note | AN-272 Op Amp Booster Designs (Rev. B) | 2013年 4月 23日 | ||
| Application note | Effect of Heavy Loads on Accuracy and Linearity of Op Amp Circuits (Rev. B) | 2013年 4月 22日 | ||
| Application note | AN-447 Protection Schemes for BI-FET Amplifiers and Switches | 2004年 5月 2日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
計算工具
ANALOG-ENGINEER-CALC — 類比工程師計算機
The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
設計工具
CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器
此設計可反轉輸入訊號 VIN，並使用 1000 V/V 或 60 dB 訊號增益。具有 T 回饋網路的反相放大器可在沒有較小 R4 值或超大回饋電阻器值的情況下獲得高增益。
設計工具
CIRCUIT060074 — 具有比較器電路的高壓側電流感測
此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器，若負載電流上升到 1 A 以上，便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時，比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時，讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器，為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用，建議使用具推挽輸出的比較器。
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| PDIP (P) | 8 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點