LMK03328
- Ultra-low noise, high performance
- Jitter: 100fs RMS typical, FOUT > 100MHz
- PSNR: –80dBc, robust supply noise immunity
- Flexible device options
- Up to 8 AC-LVPECL, AC-LVDS, AC-CML, HCSL or LVCMOS outputs, or any combination
- Pin mode, I2C mode, and EEPROM mode
- 71-pin selectable pre-programmed default start-up options
- Dual inputs with automatic or manual selection
- Crystal input: 10MHz to 52MHz
- External input: 1MHz to 300MHz
- Frequency margining options
- Fine frequency margining (±50ppm typical) using low-cost pullable crystal reference
- Glitchless coarse frequency margining (%) using output dividers
- Other features
- Supply: 3.3V core, 1.8V, 2.5V, 3.3V output
- Industrial temperature range (–40°C to 85°C)
- Package: 7mm × 7mm 48-WQFN
The LMK03328 device is an ultra-low-noise clock generator that has two fractional-N frequency synthesizers with integrated VCOs, flexible clock distribution and fan-out, and pin-selectable configuration states stored in an on-chip EEPROM. The device can generate multiple clocks for various multi-gigabit serial interfaces and digital devices, which can reduce the BOM cost and board area, and can improve reliability by replacing multiple oscillators and clock distribution devices. The ultra-low-jitter reduces bit error rate (BER) in high-speed serial links.
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LMK03328EVM — 具有 2 個 PLL、8 個差動輸出和 2 個輸入的 LMK03328EVM 超低抖動時鐘產生器 EVM
The LMK03328EVM evaluation module provides a complete clocking platform to evaluate the 100-fs RMS jitter performance and pin-/software-configuration modes and features of the Texas Instruments LMK03328 Ultra-Low-Jitter Clock Generator with Dual PLLs, 8 outputs, 2 inputs, and integrated EEPROM.
The (...)
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.
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時鐘產生器
時鐘緩衝器
Oscillators
時鐘抖動清除器
時脈網路同步器
RF PLL 與合成器
硬體開發
開發板
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IDE、配置、編譯器或偵錯程式
CLOCK-TREE-ARCHITECT — 時鐘樹架構程式設計軟體
PLLATINUMSIM-SW — PLLatinum Sim Tool
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
支援產品和硬體
產品
時鐘緩衝器
時鐘產生器
時鐘抖動清除器
Oscillators
硬體開發
開發板
軟體
支援軟體
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
WQFN (RHS) | 48 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。