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放大器
運算放大器 (op amps)
一般用途運算放大器

TLV6742

現行

雙路、5.5V、10MHz、低雜訊 (4.6-nV/√Hz) 運算放大器

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產品規格表

TLV6742

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.7 Rail-to-rail Out GBW (typ) (MHz) 10 Slew rate (typ) (V/µs) 4.5 Vos (offset voltage at 25°C) (max) (mV) 1 Iq per channel (typ) (mA) 0.99 Vn at 1 kHz (typ) (nV√Hz) 4.6 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 0.2 Features Cost Optimized, EMI Hardened CMRR (typ) (dB) 110 Iout (typ) (A) 0.068 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) 0 Input common mode headroom (to positive supply) (typ) (V) -1.2 Output swing headroom (to negative supply) (typ) (V) 0.005 Output swing headroom (to positive supply) (typ) (V) -0.005
Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.7 Rail-to-rail Out GBW (typ) (MHz) 10 Slew rate (typ) (V/µs) 4.5 Vos (offset voltage at 25°C) (max) (mV) 1 Iq per channel (typ) (mA) 0.99 Vn at 1 kHz (typ) (nV√Hz) 4.6 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 0.2 Features Cost Optimized, EMI Hardened CMRR (typ) (dB) 110 Iout (typ) (A) 0.068 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) 0 Input common mode headroom (to positive supply) (typ) (V) -1.2 Output swing headroom (to negative supply) (typ) (V) 0.005 Output swing headroom (to positive supply) (typ) (V) -0.005
SOIC (D) 8 29.4 mm² 4.9 x 6 SOT-23-THN (DDF) 8 8.12 mm² 2.9 x 2.8 TSSOP (PW) 8 19.2 mm² 3 x 6.4 VSSOP (DGK) 8 14.7 mm² 3 x 4.9 WSON (DSG) 8 4 mm² 2 x 2 X2QFN (RUG) 10 3 mm² 1.5 x 2
  • Low broadband noise: 3.5 nV/√Hz
  • Gain bandwidth: 10 MHz
  • Low input bias current: ±3 pA
  • Low offset voltage: 0.15 mV
  • Low offset voltage drift: ±0.2 µV/°C
  • Rail-to-rail output
  • Unity-gain stable
  • Low IQ:
    • TLV6741: 890 µA/ch
    • TLV6742/4: 990 µA/ch
  • Wide supply range:
    • TLV6741: 2.25 V to 5.5 V
    • TLV6742/4: 1.7 V to 5.5 V
  • Robust EMIRR performance: 71 dB at 2.4 GHz
  • Low broadband noise: 3.5 nV/√Hz
  • Gain bandwidth: 10 MHz
  • Low input bias current: ±3 pA
  • Low offset voltage: 0.15 mV
  • Low offset voltage drift: ±0.2 µV/°C
  • Rail-to-rail output
  • Unity-gain stable
  • Low IQ:
    • TLV6741: 890 µA/ch
    • TLV6742/4: 990 µA/ch
  • Wide supply range:
    • TLV6741: 2.25 V to 5.5 V
    • TLV6742/4: 1.7 V to 5.5 V
  • Robust EMIRR performance: 71 dB at 2.4 GHz

The TLV674x family includes single (TLV6741), dual (TLV6742), and quad-channel (TLV6744) general-purpose CMOS operational amplifiers (op amp) that provide a low noise figure of 3.5 nV/√Hz and a wide bandwidth of 10 MHz. The low noise and wide bandwidth make the TLV674x family of devices attractive for a variety of precision applications that require a good balance between cost and performance. Additionally, the input bias current of the TLV674x family supports applications with high source impedance.

The robust design of the TLV674x family provides ease-of-use to the circuit designer due to its unity-gain stability, integrated RFI/EMI rejection filter, no phase reversal in overdrive conditions and high electrostatic discharge (ESD) protection (2-kV HBM). Additionally, the resistive open-loop output impedance makes them easy to stabilize with much higher capacitive loads.

This op amp family is optimized for low-voltage operation as low as 2.25 V (±1.125 V) for the TLV6741 and 1.7 V (±0.85 V) for the TLV6742 and TLV6744. All of the devices operate up to 5.5 V (±2.75 V), and are specified over the temperature range of –40°C to 125°C.

The single-channel TLV6741 is available in a small-size SC70-5 package. The dual-channel TLV6742 is available in multiple package options including a tiny 1.5 mm × 2.0 mm X2QFN package.

The TLV674x family includes single (TLV6741), dual (TLV6742), and quad-channel (TLV6744) general-purpose CMOS operational amplifiers (op amp) that provide a low noise figure of 3.5 nV/√Hz and a wide bandwidth of 10 MHz. The low noise and wide bandwidth make the TLV674x family of devices attractive for a variety of precision applications that require a good balance between cost and performance. Additionally, the input bias current of the TLV674x family supports applications with high source impedance.

The robust design of the TLV674x family provides ease-of-use to the circuit designer due to its unity-gain stability, integrated RFI/EMI rejection filter, no phase reversal in overdrive conditions and high electrostatic discharge (ESD) protection (2-kV HBM). Additionally, the resistive open-loop output impedance makes them easy to stabilize with much higher capacitive loads.

This op amp family is optimized for low-voltage operation as low as 2.25 V (±1.125 V) for the TLV6741 and 1.7 V (±0.85 V) for the TLV6742 and TLV6744. All of the devices operate up to 5.5 V (±2.75 V), and are specified over the temperature range of –40°C to 125°C.

The single-channel TLV6741 is available in a small-size SC70-5 package. The dual-channel TLV6742 is available in multiple package options including a tiny 1.5 mm × 2.0 mm X2QFN package.
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類型 標題 日期
* Data sheet TLV6741, TLV6742, TLV6744 10-MHz, Low Broadband Noise, RRO, Operational Amplifier datasheet (Rev. I) PDF | HTML 2021年 8月 31日
Application note Charge Amplifier Circuit PDF | HTML 2021年 11月 8日
Analog Design Journal Second-sourcing options for small-package amplifiers 2018年 3月 26日

設計與開發

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開發板

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放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件，可測試通用運算放大器 (op amp) 參數，並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項，可滿足封裝需求，使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝，包括：

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
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開發板

DUAL-DIYAMP-EVM — 雙通道通用自製 (DIY) 放大器電路評估模組

The DUAL-DIYAMP-EVM is a unique evaluation module (EVM) family that provides engineers and do it yourselfers (DIYers) with real-world amplifier circuits, enabling you to quickly evaluate design concepts and verify simulations. It is designed specifically for dual package op amps in the (...)
使用指南: PDF
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模擬型號

Collection of test circuits in TINA-TI to accompany AN1516 (Rev. A)

SBOMBI0A.ZIP (1293 KB) - TINA-TI Reference Design
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模擬型號

TLV6742 PSpice Model (Rev. C)

SBOMB35C.ZIP (22 KB) - PSpice Model
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模擬型號

TLV6742 TINA-TI Reference Design

SBOMB36.TSC (97 KB) - TINA-TI Reference Design
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模擬型號

TLV6742 TINA-TI Reference Design for Charge Amplifier Circuit

SBOMBX8.TSC (112 KB) - TINA-TI Reference Design
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模擬型號

TLV6742 TINA-TI SPICE Model

SBOMB37.ZIP (4 KB) - TINA-TI Spice Model
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計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
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設計工具

CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器

此設計可反轉輸入訊號 VIN，並使用 1000 V/V 或 60 dB 訊號增益。具有 T 回饋網路的反相放大器可在沒有較小 R4 值或超大回饋電阻器值的情況下獲得高增益。
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設計工具

CIRCUIT060015 — 可調式參考電壓電路

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設計工具

CIRCUIT060074 — 具有比較器電路的高壓側電流感測

此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器，若負載電流上升到 1 A 以上，便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時，比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時，讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器，為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用，建議使用具推挽輸出的比較器。
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 8 Ultra Librarian
SOT-23-THN (DDF) 8 Ultra Librarian
TSSOP (PW) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian
WSON (DSG) 8 Ultra Librarian
X2QFN (RUG) 10 Ultra Librarian
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