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TLV840-Q1

現行

具有可調整重設時間延遲和手動重設功能的車用低電壓監控器

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產品規格表

TLV840-Q1

現行
產品規格表 立即訂購

產品詳細資料

Number of supplies monitored 1 Threshold voltage 1 (typ) (V) 1.2, 2.2, 2.9, 3, 3.1, 3.2, 3.6, 4 Features Manual reset capable, Reset time delay, Undervoltage monitor only Reset threshold accuracy (%) 1 Iq (typ) (mA) 0.00012 Output driver type/reset output Active-high, Active-low, Open-drain, Push-Pull Time delay (ms) 0.04, 40 Supply voltage (min) (V) 0.7 Supply voltage (max) (V) 6 TI functional safety category Functional Safety-Capable Rating Automotive Operating temperature range (°C) -40 to 125
Number of supplies monitored 1 Threshold voltage 1 (typ) (V) 1.2, 2.2, 2.9, 3, 3.1, 3.2, 3.6, 4 Features Manual reset capable, Reset time delay, Undervoltage monitor only Reset threshold accuracy (%) 1 Iq (typ) (mA) 0.00012 Output driver type/reset output Active-high, Active-low, Open-drain, Push-Pull Time delay (ms) 0.04, 40 Supply voltage (min) (V) 0.7 Supply voltage (max) (V) 6 TI functional safety category Functional Safety-Capable Rating Automotive Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8

Qualified for automotive applications:

  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature
    • Device HBM ESD classification level 2
    • Device CDM ESD classification level C7B

Designed for high performance:

  • Nano supply current : 120 nA (Typ)
  • High accuracy: ±0.5% (Typ)
  • Built-in hysteresis (VHYS): 5% (Typ)
  • Fixed threshold voltage (VIT-): 0.8 V to 5.4 V

Designed for a wide range of applications:

  • Operating voltage range : 0.7 V to 6 V
  • Fixed (VIT-) voltage: 0.8 V to 5.4 V in 0.1 V steps
  • Programmable reset time delay (tD)
    • Min time delay: 40 µs (typ) without capacitor
  • Active-low manual reset (MR)

Multiple output topologies / Package type:

  • Four output topologies (RESET / RESET):
    • TLV840MADL-Q1: open-drain, active-low
    • TLV840MAPL-Q1: push-pull, active-low
    • TLV840MADH-Q1: open-drain, active-high
    • TLV840MAPH-Q1: push-pull, active-high
  • Package: SOT23-5 (DBV)

Qualified for automotive applications:

  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature
    • Device HBM ESD classification level 2
    • Device CDM ESD classification level C7B

Designed for high performance:

  • Nano supply current : 120 nA (Typ)
  • High accuracy: ±0.5% (Typ)
  • Built-in hysteresis (VHYS): 5% (Typ)
  • Fixed threshold voltage (VIT-): 0.8 V to 5.4 V

Designed for a wide range of applications:

  • Operating voltage range : 0.7 V to 6 V
  • Fixed (VIT-) voltage: 0.8 V to 5.4 V in 0.1 V steps
  • Programmable reset time delay (tD)
    • Min time delay: 40 µs (typ) without capacitor
  • Active-low manual reset (MR)

Multiple output topologies / Package type:

  • Four output topologies (RESET / RESET):
    • TLV840MADL-Q1: open-drain, active-low
    • TLV840MAPL-Q1: push-pull, active-low
    • TLV840MADH-Q1: open-drain, active-high
    • TLV840MAPH-Q1: push-pull, active-high
  • Package: SOT23-5 (DBV)

The TLV840-Q1 device is a voltage supervisor or reset IC that can operate at wide input voltage levels from 0.7 V to 6 V while maintaining very low quiescent current across the whole VDD and temperature range. TLV840-Q1 offers the best combination of low power consumption, high accuracy and low propagation delay (tp_HL= 30 µs typical).

Reset output signal is asserted when the voltage at VDD drops below the negative voltage threshold (VIT-). Reset signal is cleared when VDD rise above VIT- plus hysteresis (VHYS) and the reset time delay (tD) expires. Reset time delay can be programmed by connecting a capacitor between the CT pin and ground. For a minimum reset delay time the CT pin can be left floating. The TLV840-Q1, with its manual reset pin (MR), offers program flexibility by forcing the system into a hard reset when the pin is asserted.

Additional features: Low power-on reset voltage (VPOR), built-in glitch immunity protection for VDD, built-in hysteresis, low open-drain output leakage current (Ilkg(OD)). TLV840-Q1 is a perfect voltage monitoring solution for automotive applications and battery-powered / low-power applications.

The TLV840-Q1 device is a voltage supervisor or reset IC that can operate at wide input voltage levels from 0.7 V to 6 V while maintaining very low quiescent current across the whole VDD and temperature range. TLV840-Q1 offers the best combination of low power consumption, high accuracy and low propagation delay (tp_HL= 30 µs typical).

Reset output signal is asserted when the voltage at VDD drops below the negative voltage threshold (VIT-). Reset signal is cleared when VDD rise above VIT- plus hysteresis (VHYS) and the reset time delay (tD) expires. Reset time delay can be programmed by connecting a capacitor between the CT pin and ground. For a minimum reset delay time the CT pin can be left floating. The TLV840-Q1, with its manual reset pin (MR), offers program flexibility by forcing the system into a hard reset when the pin is asserted.

Additional features: Low power-on reset voltage (VPOR), built-in glitch immunity protection for VDD, built-in hysteresis, low open-drain output leakage current (Ilkg(OD)). TLV840-Q1 is a perfect voltage monitoring solution for automotive applications and battery-powered / low-power applications.
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類型 標題 日期
* Data sheet TLV840-Q1 Nano-Power Voltage Supervisor with Adjustable Reset Time Delay datasheet (Rev. A) PDF | HTML 2021年 4月 13日
Functional safety information TLV840-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA PDF | HTML 2021年 4月 15日
EVM User's guide TLV840EVM Voltage Supervisor User's Guide 2020年 2月 13日

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TLV840EVM — 具有可調整復位時間延遲的低電壓監控器的 TLV840 評估模組

The TLV840 evaluation module (EVM) is designed to evaluate the performance of the TLV840 product, which is a 5-pin voltage supervisor and reset IC. TLV840 offers operation up to 6 V, while maintaining low quiescent current of 1.2 µA (max) in addition to 2% maximum accuracy.

TLV840EVM supports (...)

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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