TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
Productos y hardware compatibles
Productos
Búferes de reloj
Generadores de señal de reloj
Limpiadores de fluctuación de reloj
Osciladores
PLL y sintetizadores de RF
Sincronizadores de red de reloj
Desarrollo de hardware
Placa de evaluación
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
TICS Pro 1.7.7.10 installer binary for Windows operating system
Productos
Búferes de reloj
Generadores de señal de reloj
Limpiadores de fluctuación de reloj
Osciladores
PLL y sintetizadores de RF
Sincronizadores de red de reloj
Desarrollo de hardware
Placa de evaluación
Documentación
TICS Pro 1.7.7.10 Software Manifest
TICS Pro 1.7.7.10 Release Notes
Información de la versión
Bug Fixes
- LMK05028 - bugfixes to frequency updates and DPLL coefficient script
Known Issues
- LMK5B and LMK5C family - In some cases, "Assign Selected VCO Settings to Device" and "Apply Output Clock Settings to Device" may need to be pressed twice for certain cascaded configurations to display correctly
- LMK5C33216 - When cascading from VCO3 to DPLL input, the divide value must manually be entered into DPLLx_REF5_RDIV as ( VCO3 output frequency / DPLLx TDC frequency )
- LMK05318 - In some cases, it is necessary to press "Calculate Frequency Plan" twice for correct VCO2 frequency. This issue is resolved in LMK05318B GUI.
- Burst mode page looping requires long delays to halt, and halting may crash the GUI. If possible, do not loop in burst mode.
- User Controls page can sometimes become desynchronized from Raw Registers and other pages. Refer to Raw Registers or other pages for correct values. Saving/Loading and Import/Export of register data is unaffected, and register data will still be written to and read from connected devices correctly.