SLLU331 March 2021 ISO6721 , ISO6721-Q1 , ISO6741 , ISO6741-Q1 , ISO7021 , ISO7041 , ISO7131CC , ISO7140CC , ISO7140FCC , ISO7141CC , ISO7141FCC , ISO7142CC , ISO7142CC-Q1 , ISO721 , ISO721-Q1 , ISO721M , ISO721M-EP , ISO722 , ISO722-Q1 , ISO7220A , ISO7220A-Q1 , ISO7220B , ISO7220C , ISO7220M , ISO7221A , ISO7221A-Q1 , ISO7221B , ISO7221C , ISO7221C-HT , ISO7221C-Q1 , ISO7221M , ISO722M , ISO7230C , ISO7230M , ISO7231C , ISO7231C-Q1 , ISO7231M , ISO7240C , ISO7240CF , ISO7240CF-Q1 , ISO7240M , ISO7241A-EP , ISO7241C , ISO7241C-Q1 , ISO7241M , ISO7242C , ISO7242C-Q1 , ISO7242M , ISO7310-Q1 , ISO7310C , ISO7310FC , ISO7320-Q1 , ISO7320C , ISO7320FC , ISO7321-Q1 , ISO7321C , ISO7321FC , ISO7330-Q1 , ISO7330C , ISO7330FC , ISO7331-Q1 , ISO7331C , ISO7331FC , ISO7340-Q1 , ISO7340C , ISO7340FC , ISO7341-Q1 , ISO7341C , ISO7341FC , ISO7342-Q1 , ISO7342C , ISO7342FC , ISO7420 , ISO7420E , ISO7420FCC , ISO7420FE , ISO7420M , ISO7421 , ISO7421-EP , ISO7421A-Q1 , ISO7421E , ISO7421E-Q1 , ISO7421FE , ISO7520C , ISO7521C , ISO7631FC , ISO7631FM , ISO7640FM , ISO7641FC , ISO7641FM , ISO7710 , ISO7710-Q1 , ISO7720 , ISO7720-Q1 , ISO7721 , ISO7721-Q1 , ISO7730 , ISO7730-Q1 , ISO7731 , ISO7731-Q1 , ISO7740 , ISO7740-Q1 , ISO7741 , ISO7741-Q1 , ISO7741E-Q1 , ISO7742 , ISO7742-Q1 , ISO7760 , ISO7760-Q1 , ISO7761 , ISO7761-Q1 , ISO7762 , ISO7762-Q1 , ISO7763 , ISO7763-Q1 , ISO7810 , ISO7820 , ISO7821 , ISO7830 , ISO7831 , ISO7840 , ISO7841 , ISO7842 , ISOW7821 , ISOW7840 , ISOW7841 , ISOW7841A-Q1 , ISOW7842 , ISOW7843 , ISOW7844
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This user’s guide describes EVM operation with respect to most digital isolator devices that come in standard pin-compatible packages. The EVM can be used for evaluation of any of TI single-channel, dual-channel, triple-channel, quad-channel, or six-channels digital isolator devices in various packages: 8-pin SOIC (D), 8-pin WB SOIC (DWV), 16-pin QSOP (DBQ), 16-pin WB SOIC (DW), and 16-pin ultra WB SOIC (DWW). This guide also describes the standard pin configurations of devices for each package, bill of materials, EVM schematic, PCB layout, and typical laboratory test setup. A typical input and output waveform is also presented.
The DIGI-ISO-EVM has provision for multiple device footprints that are unoccupied to allow for testing of various digital isolator devices from various isolator families. Figure 2-1 through Figure 2-18 show all possible device pin configurations of digital isolators with different channel options in different packages that can be tested on this EVM. The figures also provide reference to device footprint designators (like U1) of the EVM where a given digital isolator for a given channel option in a given package can be tested on the EVM. Table 2-1 can be used as a quick reference table to identify the device footprint designator where a digital isolator can be tested for a given channel and package options.
Number of Channels | Digital Isolator Part Numbers That can be Tested | Example Part Number | Package | Location Where it can be Tested |
---|---|---|---|---|
1 | ISOxx10 | ISO7710 | D-8 | U2 |
DWV-8 | U1 | |||
DW-16 | U3 | |||
ISO7810 | DWW-16 | U5 | ||
2 | ISOxx2x | ISO7721 | D-8 | U2 |
DWV-8 | U1 | |||
DW-16 | U3 | |||
ISO7821 | DWW-16 | U5 | ||
3 | ISOxx3x | ISO7731 | DBQ-16 | U6 |
DW-16 | U4 | |||
ISO7831 | DWW-16 | U5 | ||
4 | ISOxx4x | ISO7741 | DBQ-16 | U6 |
DW-16 | U4 | |||
ISO7841 | DWW-16 | U5 | ||
6 | ISOxx6x | ISO7762 | DBQ-16 | U7 |
DW-16 | U8 |
Figure 3-1 shows the 3D diagram of the EVM.
This section describes the setup and operation of the EVM for parameter performance evaluation. Figure 4-1 shows the configuration for operating the universal digital isolator EVM for one device footprint using two power supplies.
Figure 4-2 shows typical input and output waveforms of the EVM for a 1-MHz clock. The input is shown as channel 1, and the output is shown as channel 2.
Table 5-1 shows the bill of materials (BOM) for this EVM.
Item | Designator | Description | Manufacturer | Part Number | Quantity |
---|---|---|---|---|---|
1 | C1, C2, C3, C4, C5, C6, C19, C24, C25, C30 | CAP, CERM, 0.1 uF, 25 V, ±5%, X7R, 0603 | AVX | 06033C104JAT2A | 10 |
2 | C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C20, C21, C22, C23, C26, C27, C28, C29 | CAP, CERM, 1 uF, 25 V, ±10%, X5R, 0603 | TDK | C1608X5R1E105K080AC | 20 |
3 | H1, H2, H3, H4 | Bumpon, Hemisphere, 0.44 X 0.20, Clear | 3M | SJ-5303 (CLEAR) | 4 |
4 | J1, J2, J3, J4 | Header, 100mil, 6x2, Gold, TH | TE Connectivity | 87227-6 | 4 |
5 | LBL1 | Thermal Transfer Printable Labels, 0.650" W x 0.200" H - 10,000 per roll | Brady | THT-14-423-10 | 1 |
6 | P1, P2, P3, P4, P5, P8, P9, P10, P11, P14, P15, P16 | Header, 2.54 mm, 2x1, Gold, TH | Wurth Elektronik | 61300211121 | 12 |
7 | P6, P7, P12, P13 | Header, 2.54 mm, 5x2, Gold, TH | Wurth Elektronik | 61301021121 | 4 |
The universal digital isolator EVM is designed to accommodate various digital isolators with different channel options in different packages. To evaluate any of the digital isolator devices in a given package, populate the device of interest on the DIGI-ISO-EVM PCB according to the footprint positions suggested in section 2. No other component requires any modification on the EVM. Figure 6-1 shows the DIGI-ISO-EVM schematic and Figure 6-2 shows the printed-circuit board (PCB) layout of the EVM.