This is another dead time period once Q₂ and Q₁ both turn off. Mode 4 is also similar to mode 2. A slight difference is that now the bootstrap capacitor has provided power to drive the high side FET. Voltage in bootstrap diode is decreased to the lowest value in steady state. Others remain the same as in mode 2.

In conclusion, influence to the gate driver caused by power stage is to change the voltage potential in HS node. Moreover, this influence can affect the working condition of bootstrap diode, forward conduction or reverse bias.

Previously mentioned is the working principle of bootstrap circuits, the influence of extra power supply in HB-HS can be discussed later. First, simulation can be used to explain why higher duty cycle can cause higher current stress in bootstrap diode.

In simulation using PSpice™, duty cycle of Q₂ is set to 50% and bootstrap diode without reverse recovery characteristic is used first. Value of bootstrap capacitor is 100nF.

Figure 3-6 Simulation Results (D=50%, C_boot=100nF)

D: duty cycle of high side FET

V_boot: voltage in bootstrap capacitor

V_hs: HS to ground voltage

I_boot: ­current flows into bootstrap capacitor

As shown from Figure 3-7, the bootstrap capacitor can be charged in mode 4. And because V_boot have increased to a higher value than the possible maximum voltage in mode 1. Voltage of bootstrap capacitor can remain the same at mode 1. In the transition time from mode 2 to 3, bootstrap capacitor can provide power to turn-on the FET, so we can see the negative current in I_boot and the voltage drop in V_boot. The simulation results basically verified the theoretical analysis.

And what can happen if we increase duty cycle to a higher value. We increase the duty cycle to 99%.

Figure 3-7 Simulation Results (D=99%, C_boot=100nF)

As shown, the transitions are tighter which means the bootstrap diode can withstand higher current stress in a short time.

Using same 100nf bootstrap capacitor, but adding reverse recovery characteristic in diode to do the simulation. As shown, large reverse current flows through body diode.

Figure 3-8 Simulation Results (D=99% With Reverse Recovery Characteristic)

And another key point is that if we consider the reverse recovery current of the bootstrap diode, the current stress can be more serious in high duty cycle than the normal duty cycle. Reverse recovery current is associated with reverse recovery time and forward current at the time that diode withstand reverse bias. Reverse recovery time is mainly decided by physical characteristic of diode. So, the forward current is what we can consider in that situation. Compared with small capacitance, lager bootstrap capacitance can have larger time constant. So, if duty cycle of high side FET is approached to 100%, there is no enough time to charge the larger capacitor up, and current can maintain a higher value when working mode is changed to mode 3 (high side FET on, low side FET off). This causes a higher reverse recovery current than using small bootstrap capacitor because charging current of small capacitor can decrease to a low side value if the time keep the same. But in normal duty cycle, charge or discharge current all can decrease to a low value.

In facts, if we connect extra power supply in HB-HS and did not design properly, the influence is increased the equivalent capacitance and causes higher reverse recovery current.