Startseite Schnittstelle Ethernet-ICs Ethernet: Retimer, Redriver und MUX-Puffer

DS110DF1610

AKTIV

8,5–11,3 Gbit/s, 16-Kanal-Retimer

Produktdetails

Type Retimer Mux Number of channels 16 Input compatibility AC-coupling, CML Speed (max) (Gbps) 11.3 Protocols 10G-SR/LR, 40G-SR4/LR4, General purpose, Infiniband Operating temperature range (°C) -10 to 85
Type Retimer Mux Number of channels 16 Input compatibility AC-coupling, CML Speed (max) (Gbps) 11.3 Protocols 10G-SR/LR, 40G-SR4/LR4, General purpose, Infiniband Operating temperature range (°C) -10 to 85
FCBGA (ABB) 196 225 mm² 15 x 15
  • Pin-Compatible Family
    • DS150DF1610: 12.5 - 15G
    • DS125DF1610: 9.8 to 12.5G
    • DS110DF1610: 8.5 – 11.3G
  • 4x4 Analog Cross Point Switch for Each Quad
  • Fully-Adaptive CTLE
  • Self-Tuning DFE, With Optional Continuous Adaption
  • On-Chip, AC-coupling on Receive Inputs
  • Adjustable Transmit VOD
  • Adjustable 3-Tap Transmit FIR Filter
  • Locks to Half/Quarter/Eighth Data Rates For Legacy Support
  • On-Chip Eye Monitor (EOM), PRBS Checker, PRBS Pattern Generator
  • Supports IEEE 1149.1 and 1149.6
  • Programmable Output Polarity Inversion
  • Input Signal Detection, CDR Lock Detection
  • Single 2.5-V ±5% Power Supply
  • SMBus-Based Register Configuration
  • Optional EEPROM Configuration
  • 15-mm × 15-mm, 196-Pin FCBGA Package
  • Operating Temp Range : –10°C to +85°C
  • Pin-Compatible Family
    • DS150DF1610: 12.5 - 15G
    • DS125DF1610: 9.8 to 12.5G
    • DS110DF1610: 8.5 – 11.3G
  • 4x4 Analog Cross Point Switch for Each Quad
  • Fully-Adaptive CTLE
  • Self-Tuning DFE, With Optional Continuous Adaption
  • On-Chip, AC-coupling on Receive Inputs
  • Adjustable Transmit VOD
  • Adjustable 3-Tap Transmit FIR Filter
  • Locks to Half/Quarter/Eighth Data Rates For Legacy Support
  • On-Chip Eye Monitor (EOM), PRBS Checker, PRBS Pattern Generator
  • Supports IEEE 1149.1 and 1149.6
  • Programmable Output Polarity Inversion
  • Input Signal Detection, CDR Lock Detection
  • Single 2.5-V ±5% Power Supply
  • SMBus-Based Register Configuration
  • Optional EEPROM Configuration
  • 15-mm × 15-mm, 196-Pin FCBGA Package
  • Operating Temp Range : –10°C to +85°C

The DS110DF1610 is a sixteen-channel multi-rate retimer with integrated signal conditioning. The device includes a full adaptive Continuous Time Linear Equalizer (CTLE), Decision Feedback Equalizer (DFE), clock and data recovery (CDR), and a transmit FIR filter to enhance the reach and robustness over long, lossy, crosstalk impaired high speed serial links to achieve BER < 1×10-15.

Each channel of the DS110DF1610 independently locks to serial data at 8.5 to 11.3 Gbps and any supported sub-multiple. A simple external oscillator (±100ppm) that is synchronous or asynchronous with the incoming data stream can be used as a reference clock to speed up the lock process. Integrated 4x4 cross point switches allow for full non-blocking routing or broadcasting within each quad of the DS110DF1610.

Programmable transmit FIR filter offers control of the pre-cursor, main tap and post-cursor for transmit equalization. The fully adaptive receive equalization (CTLE and DFE) enables longer distance transmission in lossy copper interconnects and backplanes with multiple connectors.

A non-disruptive mission mode eye-monitor feature allows link monitoring internal to the receiver. The built-in PRBS generator and checker compliment the internal diagnostic features to complete standalone BERT measurements. Built-in JTAG enables manufacturing tests.

The DS110DF1610 is a sixteen-channel multi-rate retimer with integrated signal conditioning. The device includes a full adaptive Continuous Time Linear Equalizer (CTLE), Decision Feedback Equalizer (DFE), clock and data recovery (CDR), and a transmit FIR filter to enhance the reach and robustness over long, lossy, crosstalk impaired high speed serial links to achieve BER < 1×10-15.

Each channel of the DS110DF1610 independently locks to serial data at 8.5 to 11.3 Gbps and any supported sub-multiple. A simple external oscillator (±100ppm) that is synchronous or asynchronous with the incoming data stream can be used as a reference clock to speed up the lock process. Integrated 4x4 cross point switches allow for full non-blocking routing or broadcasting within each quad of the DS110DF1610.

Programmable transmit FIR filter offers control of the pre-cursor, main tap and post-cursor for transmit equalization. The fully adaptive receive equalization (CTLE and DFE) enables longer distance transmission in lossy copper interconnects and backplanes with multiple connectors.

A non-disruptive mission mode eye-monitor feature allows link monitoring internal to the receiver. The built-in PRBS generator and checker compliment the internal diagnostic features to complete standalone BERT measurements. Built-in JTAG enables manufacturing tests.

Herunterladen Video mit Transkript ansehen Video

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 4
Typ Titel Datum
* Data sheet DS110DF1610 8.5- to 11.3-Gbps 16-Channel Retimer datasheet (Rev. A) PDF | HTML 15 Jun 2017
Application note Extend reach with Ethernet Redrivers and Retimers for 10G-12.5G Applications (Rev. A) 31 Jan 2023
Analog Design Journal Green box testing: A method for optimizing high-speed serial links 21 Jul 2016
Application note Understanding EEPROM Programming for 10G to 12.5G Retimers 13 Jan 2016

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Simulationsmodell

DS1xxDF1610 IBIS-AMI Model

SLNM009.ZIP (4779 KB) - IBIS-AMI Model
Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Simulationstool

TINA-TI — SPICE-basiertes analoges Simulationsprogramm

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Benutzerhandbuch: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
FCBGA (ABB) 196 Ultra Librarian

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos