Startseite Schnittstelle LVDS-, M-LVDS- und PECL-ICs

DS90LV032A

AKTIV

LVDS-Vierfach-Differenzialleitungsempfänger 3 V, 400 Mbit/s

Produktdetails

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVCMOS Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVCMOS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • >400 Mbps (200 MHz) Switching Rates
  • 0.1-ns Channel-to-Channel Skew (Typical)
  • 0.1-ns Differential Skew (Typical)
  • 3.3-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • Power Down High Impedance on LVDS Inputs
  • Low Power Design (40 mW at 3.3 V Static)
  • Interoperable With Existing 5-V LVDS Networks
  • Accepts Small Swing (350 mV Typical) VID
  • Supports Open, Short, and Terminated Input Fail-Safe
  • Compatible With ANSI/TIA/EIA-644
  • Industrial Temperature Operating Range (–40°C to 85°C)
  • Available in SOIC and TSSOP Packaging
  • >400 Mbps (200 MHz) Switching Rates
  • 0.1-ns Channel-to-Channel Skew (Typical)
  • 0.1-ns Differential Skew (Typical)
  • 3.3-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • Power Down High Impedance on LVDS Inputs
  • Low Power Design (40 mW at 3.3 V Static)
  • Interoperable With Existing 5-V LVDS Networks
  • Accepts Small Swing (350 mV Typical) VID
  • Supports Open, Short, and Terminated Input Fail-Safe
  • Compatible With ANSI/TIA/EIA-644
  • Industrial Temperature Operating Range (–40°C to 85°C)
  • Available in SOIC and TSSOP Packaging

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100 Ω) input Fail-safe. The receiver output is HIGH for all fail-safe conditions.

The DS90LV032A and companion LVDS line driver (for example, DS90LV031A) provide a new alternative to high power PECL or ECL devices for high speed point-to-point interface applications.

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100 Ω) input Fail-safe. The receiver output is HIGH for all fail-safe conditions.

The DS90LV032A and companion LVDS line driver (for example, DS90LV031A) provide a new alternative to high power PECL or ECL devices for high speed point-to-point interface applications.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver datasheet (Rev. D) PDF | HTML 24 Aug 2016
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 Aug 2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling 16 Mai 2018
More literature Die D/S DS90LV032A MDS (PRELIMINARY) 3V LVDS Quad CMOS Diff Line Receive 20 Dez 2012
Application note AN-1110 LVDS Quad Dynamic I CC vs Frequency 15 Mai 2004
Application note An Overview of LVDS Technology 05 Okt 1998

Design und Entwicklung

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Evaluierungsplatine

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Benutzerhandbuch: PDF
Simulationsmodell

DS90LV032A IBIS Model

SNLM021.ZIP (12 KB) - IBIS Model
Simulationstool

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian

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