SN65HVD12-EP

Name: SN65HVD12-EP
Brand: TI
SKU: SN65HVD12-EP
Price: 3.518 USD

AKTIV

Verbessertes Produkt – Transceiver für RS-485, 3,3 V

Jetzt bestellen

Datenblatt

document-pdfAcrobat 3.3 V RS-485 Transceivers datasheet (Rev. E) (Englisch)

SN65HVD12-EP

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Number of receivers

1

Number of transmitters

1

Duplex

Half

Supply voltage (nom) (V)

3.3

Signaling rate (max) (Mbps)

1

Fault protection (V)

-9 to 14

Common-mode range (V)

-7 to 12

Number of nodes

256

Isolated

No

Supply current (max) (µA)

15500

Rating

HiRel Enhanced Product

Operating temperature range (°C)

-40 to 85

Number of receivers

1

Number of transmitters

1

Duplex

Half

Supply voltage (nom) (V)

3.3

Signaling rate (max) (Mbps)

1

Fault protection (V)

-9 to 14

Common-mode range (V)

-7 to 12

Number of nodes

256

Isolated

No

Supply current (max) (µA)

15500

Rating

HiRel Enhanced Product

Operating temperature range (°C)

-40 to 85

SOIC (D)

8

29.4 mm² 4.9 x 6

Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
Extended Temperature Performance of Up to -40°C to 125°C and -55°C to 125°C
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree⁽¹⁾
Operates With a 3.3 V Supply
Bus-Pin ESD Protection Exceeds 16 kV HBM
1/8 Unit-Load Option Available (Up to 256 Nodes on the Bus)
Optional Driver Output Transition Times for Signaling Rates of 1 Mbps, 10 Mbps, and 25 Mbps⁽²⁾
Meets or Exceeds the Requirements of ANSI TIA/EIA-485-A
Bus-Pin Short Circuit Protection From -7 V to 12 V
Low-Current Standby Mode . . . 1 µA (Typ)
Open-Circuit, Idle-Bus, and Shorted-Bus Failsafe Receiver
Thermal Shutdown Protection
Glitch-Free Power-Up and Power-Down Protection for Hot-Plugging Applications
SN75176 Footprint
APPLICATIONS
- Digital Motor Control
- Utility Meters
- Chassis-to-Chassis Interconnects
- Electronic Security Stations
- Industrial Process Control
- Building Automation
- Point-of-Sale (POS) Terminals and Networks

⁽¹⁾ Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

⁽²⁾ The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
Extended Temperature Performance of Up to -40°C to 125°C and -55°C to 125°C
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree⁽¹⁾
Operates With a 3.3 V Supply
Bus-Pin ESD Protection Exceeds 16 kV HBM
1/8 Unit-Load Option Available (Up to 256 Nodes on the Bus)
Optional Driver Output Transition Times for Signaling Rates of 1 Mbps, 10 Mbps, and 25 Mbps⁽²⁾
Meets or Exceeds the Requirements of ANSI TIA/EIA-485-A
Bus-Pin Short Circuit Protection From -7 V to 12 V
Low-Current Standby Mode . . . 1 µA (Typ)
Open-Circuit, Idle-Bus, and Shorted-Bus Failsafe Receiver
Thermal Shutdown Protection
Glitch-Free Power-Up and Power-Down Protection for Hot-Plugging Applications
SN75176 Footprint
APPLICATIONS
- Digital Motor Control
- Utility Meters
- Chassis-to-Chassis Interconnects
- Electronic Security Stations
- Industrial Process Control
- Building Automation
- Point-of-Sale (POS) Terminals and Networks

⁽¹⁾ Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

⁽²⁾ The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

The SN65HVD10, SN65HVD11, and SN65HVD12 combine a 3-state differential line driver and differential input line receiver that operate with a single 3.3 V power supply. They are designed for balanced transmission lines and meet or exceed ANSI standard TIA/EIA-485-A and ISO 8482:1993. These differential bus transceivers are monolithic integrated circuits designed for bidirectional data communication on multipoint bus-transmission lines. The drivers and receivers have active-high and active-low enables respectively, that can be externally connected together to function as direction control. Low device standby supply current can be achieved by disabling the driver and the receiver.

The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or V_CC = 0. These parts feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications.

The SN65HVD10, SN65HVD11, and SN65HVD12 combine a 3-state differential line driver and differential input line receiver that operate with a single 3.3 V power supply. They are designed for balanced transmission lines and meet or exceed ANSI standard TIA/EIA-485-A and ISO 8482:1993. These differential bus transceivers are monolithic integrated circuits designed for bidirectional data communication on multipoint bus-transmission lines. The drivers and receivers have active-high and active-low enables respectively, that can be externally connected together to function as direction control. Low device standby supply current can be achieved by disabling the driver and the receiver.

The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or V_CC = 0. These parts feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications.

filter

Andere RS-485- & RS-422-Transceiver suchen

Herunterladen Video mit Transkript ansehen Video

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)

Anfordern

Simulationstool

TINA-TI — SPICE-basiertes analoges Simulationsprogramm

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)

Benutzerhandbuch: PDF

View Options

Gehäuse	Pins	CAD-Symbole, Footprints und 3D-Modelle
SOIC (D)	8	Ultra Librarian

Es gelten die allgemeinen Geschäftsbedingungen von TI für Evaluierungsartikel.

SN65HVD12-EP

Verbessertes Produkt – Transceiver für RS-485, 3,3 V

SN65HVD12-EP

Produktdetails

Ähnliche Produkte, die für Sie interessant sein könnten

Ähnliche Funktionalität wie verglichener Baustein

Technische Dokumentation

Design und Entwicklung

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

TINA-TI — SPICE-basiertes analoges Simulationsprogramm

Bestellen & Qualität

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Videoreihe

Videos