Información de empaque
| Encapsulado | Pines SOIC (D) | 14 |
| Rango de temperatura de funcionamiento (℃) -40 to 125 |
| Cant. de paquetes | Empresa de transporte 2,500 | LARGE T&R |
Características para SN74AHC74Q-Q1
- AEC-Q100 qualified for automotive applications:
- Device temperature grade 1: -40°C to +125°C
- Device HBM ESD classification level 2
- Device CDM ESD classification level C4B
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Available in wettable flank QFN package
- Operating range 2V to 5.5V VCC
- Latch-up performance exceeds 250mA per JESD 17
Descripción de SN74AHC74Q-Q1
The SN74AHC74Q-Q1 dual positive-edge-triggered device is a D-type flip-flop.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.