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Amplificadores operacionales (op amps)
Amplificadores operacionales de alta velocidad (GBW ≥ 50 MHz)

THS3215

ACTIVO

Amplificador de salida DAC de CC a 650 MHz, diferencial a extremo simple

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THS3215

ACTIVO
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Detalles del producto

Architecture Current FB Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15.8 GBW (typ) (MHz) 650 BW at Acl (MHz) 650 Acl, min spec gain (V/V) 3 Slew rate (typ) (V/µs) 3000 Vn at flatband (typ) (nV√Hz) 6.6 Vn at 1 kHz (typ) (nV√Hz) 22 Iq per channel (typ) (mA) 34.5 Vos (offset voltage at 25°C) (max) (mV) 18 Rail-to-rail No Features Differential-to-single-ended conversion, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 48 Input bias current (max) (pA) 4000000 Offset drift (typ) (µV/°C) 58 Iout (typ) (mA) 95 2nd harmonic (dBc) 66 3rd harmonic (dBc) 68 Frequency of harmonic distortion measurement (MHz) 20
Architecture Current FB Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15.8 GBW (typ) (MHz) 650 BW at Acl (MHz) 650 Acl, min spec gain (V/V) 3 Slew rate (typ) (V/µs) 3000 Vn at flatband (typ) (nV√Hz) 6.6 Vn at 1 kHz (typ) (nV√Hz) 22 Iq per channel (typ) (mA) 34.5 Vos (offset voltage at 25°C) (max) (mV) 18 Rail-to-rail No Features Differential-to-single-ended conversion, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 48 Input bias current (max) (pA) 4000000 Offset drift (typ) (µV/°C) 58 Iout (typ) (mA) 95 2nd harmonic (dBc) 66 3rd harmonic (dBc) 68 Frequency of harmonic distortion measurement (MHz) 20
VQFN (RGV) 16 16 mm² 4 x 4
  • Input stage: internal gain of 2 V/V
    • Buffered differential inputs
    • Single-ended low impedance output
    • Full-power bandwidth: 350 MHz (2 VPP)
  • Output stage: gain externally configurable
    • Full-power bandwidth: 270 MHz (5 VPP)
    • Slew rate: 3000 V/µs
    • SPDT input switch and multiplexer
  • Full signal path: input stage and output stage
    • HD2 (20 MHz, 5 VPP to 100 Ω load): –66 dBc
    • HD3 (20 MHz, 5 VPP to 100 Ω load): –68 dBc
    • 10 VPP Output to 100 Ω load using split ±6.5 V supply
    • 12 VPP Output to heavy capacitive loads using single 15 V supply
  • Internal DC reference buffer with low-impedance output
  • Power-supply range:
    • Split supply: ±4 V to ±7.9 V
    • Single supply: 8 V to 15.8 V
  • Input stage: internal gain of 2 V/V
    • Buffered differential inputs
    • Single-ended low impedance output
    • Full-power bandwidth: 350 MHz (2 VPP)
  • Output stage: gain externally configurable
    • Full-power bandwidth: 270 MHz (5 VPP)
    • Slew rate: 3000 V/µs
    • SPDT input switch and multiplexer
  • Full signal path: input stage and output stage
    • HD2 (20 MHz, 5 VPP to 100 Ω load): –66 dBc
    • HD3 (20 MHz, 5 VPP to 100 Ω load): –68 dBc
    • 10 VPP Output to 100 Ω load using split ±6.5 V supply
    • 12 VPP Output to heavy capacitive loads using single 15 V supply
  • Internal DC reference buffer with low-impedance output
  • Power-supply range:
    • Split supply: ±4 V to ±7.9 V
    • Single supply: 8 V to 15.8 V

The THS3215 combines the key signal-chain components required to interface with a complementary-current output, digital-to-analog converter (DAC).

The flexibility provided by this two-stage amplifier system delivers the low distortion, dc-coupled, differential to single-ended signal processing required by a wide range of systems.The input stage buffers the DAC resistive termination, and converts the signal from differential to single-ended with a fixed gain of 2 V/V. The differential to single-ended output is available externally for direct use, and can also be connected through an RLC filter or attenuator to the input of an internal output power stage (OPS). The wideband, current-feedback, output power stage provides all pins externally for flexible gain setting.

An internal 2 × 1 multiplexer (mux) to the output power stage noninverting input provides an easy means to select between the internal differential-to-single-ended stage (D2S) output or an external input.

An optional on-chip midsupply buffer provides a wideband, low-output-impedance source for biasing during single-supply operation through the signal-path stages. This feature provides very simple biasing for single-supply, ac-coupled applications operating up to a maximum 15.8-V supply. An external input to this buffer allows for a dc error-correction loop, or a simple output dc offset feature.

A companion device, the THS3217, provides the same functional features at higher quiescent power and bandwidth. The THS3215 and THS3217 support the emerging high-speed Texas Instruments DACs for AWG applications, such as the DAC38J82.

The THS3215 combines the key signal-chain components required to interface with a complementary-current output, digital-to-analog converter (DAC).

The flexibility provided by this two-stage amplifier system delivers the low distortion, dc-coupled, differential to single-ended signal processing required by a wide range of systems.The input stage buffers the DAC resistive termination, and converts the signal from differential to single-ended with a fixed gain of 2 V/V. The differential to single-ended output is available externally for direct use, and can also be connected through an RLC filter or attenuator to the input of an internal output power stage (OPS). The wideband, current-feedback, output power stage provides all pins externally for flexible gain setting.

An internal 2 × 1 multiplexer (mux) to the output power stage noninverting input provides an easy means to select between the internal differential-to-single-ended stage (D2S) output or an external input.

An optional on-chip midsupply buffer provides a wideband, low-output-impedance source for biasing during single-supply operation through the signal-path stages. This feature provides very simple biasing for single-supply, ac-coupled applications operating up to a maximum 15.8-V supply. An external input to this buffer allows for a dc error-correction loop, or a simple output dc offset feature.

A companion device, the THS3217, provides the same functional features at higher quiescent power and bandwidth. The THS3215 and THS3217 support the emerging high-speed Texas Instruments DACs for AWG applications, such as the DAC38J82.
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Documentación técnica

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* Data sheet THS3215 650-MHz, Differential to Single-Ended DAC Output Amplifier datasheet (Rev. C) PDF | HTML 18 jun 2021

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

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