TPL7407L
- 600-mA Rated Drain Current (Per Channel)
- CMOS Pin-to-Pin Improvement of 7-channel
Darlington Array (e.g. ULN2003A) - Power Efficient (Very low VOL)
- Less Than 4 Times Lower VOL at 100 mA Than
Darlington Array
- Less Than 4 Times Lower VOL at 100 mA Than
- Very Low Output Leakage < 10 nA Per Channel
- Extended Ambient Temperature Range:
TA = –40°C to 125°C - High-Voltage Outputs 40 V
- Compatible with 1.8-V to 5.0-V Micro-controllers
and Logic Interface - Internal Free-wheeling Diodes for Inductive Kick-
back Protection - Input Pull-down Resistors Allows Tri-stating the
Input Driver - Input RC-Snubber to Eliminate Spurious
Operation in Noisy Environment - Inductive Load Driver Applications
- ESD Protection Exceeds JESD 22
- 2-kV HBM, 500-V CDM
- Available in 16-pin SOIC and TSSOP Packages
The TPL7407L is a high-voltage, high-current NMOS transistor array. This device consists of seven NMOS transistors that feature high-voltage outputs with common-cathode clamp diodes for switching inductive loads. The maximum drain-current rating of a single NMOS channel is 600 mA. New regulation and drive circuitry added to give maximum drive strength across all GPIO ranges (1.8 V – 5.0 V).The transistors can be paralleled for higher current capability.
The TPL7407L’s key benefit is its improved power efficiency and lower leakage than a Bipolar Darlington Implementation. With the lower VOL the user is dissipating less than half the power than traditional relay drivers with currents less than 250 mA per channel.
技術資料
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1 をすべて表示 | 種類 | タイトル | 最新の英語版をダウンロード | 日付 | |||
|---|---|---|---|---|---|---|
| * | データシート | TPL7407L 40-V 7-Channel Low Side Driver データシート (Rev. D) | PDF | HTML | 2016年 3月 10日 |
購入と品質
記載されている情報：
- RoHS
- REACH
- デバイスのマーキング
- リード端子の仕上げ / ボールの原材料
- MSL 定格 / ピーク リフロー
- MTBF/FIT 推定値
- 使用原材料
- 認定試験結果
- 継続的な信頼性モニタ試験結果
記載されている情報：
- ファブの拠点
- 組み立てを実施した拠点