DAC38RF93
- 14-bit resolution
- Maximum DAC sample rate: 9 GSPS
- Key Specifications:
- RF full-scale output power at 2.1 GHz:
- DAC38RF80/90/84: 0 dBm
- DAC38RF83/93/85: 3 dBm (with 2:1 balun)
- Spectral performance(on-chip PLL, DIFF):
- fDAC = 5898.24 MSPS, fOUT = 2.14 GHz
- WCDMA ACLR: 75 dBc
- WCDMA alt-ACLR: 77 dBc
- fDAC = 8847.36 MSPS, fOUT = 3.7 GHz
- 20 MHz LTE ACLR: 63 dBc
- fDAC = 9 GSPS, fOUT = 1.8 GHz
- IMD3 = 70 dBc (–6 dBFS, 10-MHz tone spacing)
- NSD = –157 dBc/Hz
- fDAC = 5898.24 MSPS, fOUT = 2.14 GHz
- RF full-scale output power at 2.1 GHz:
- Dual-band digital up-converter per DAC
- 6, 8, 10, 12, 16, 18, 20 or 24x interpolation
- 4 Independent NCOs with 48-bit resolution
- JESD204B Interface, subclass 1
- Support for multichip synchronization
- Maximum lane rate: 12.5 Gbps
- Single-ended output with integrated balun (DAC38RF80/90/84) covering 700 MHz to 3800 MHz
- Internal PLL and VCO with bypass
- fC(VCO) = 5.9 or 8.9 GHz
- Power dissipation: 1.4 to 2.2 W/ch
- Power supplies: –1.8 V, 1 V, 1.8 V
- Package: 10 x 10 mm BGA, 0.8 mm pitch, 144-balls
The DAC38RFxx is a family of high-performance, dual/single-channel, 14-bit, 9-GSPS, RF-sampling digital-to-analog converters (DACs) that are capable of synthesizing wideband signals from 0 to 4.5 GHz. A high dynamic range allows the DAC38RFxx family to generate signals for a wide range of applications including 3G/4G signals for wireless base-stations and radar.
The devices feature a low-power JESD204B Interface with up to 8 lanes with a maximum bit rate of 12.5 Gbps allowing an input data rate of 1.25 GSPS complex per channel. The DAC38RFxx provides two digital up-converters per channel, with multiple options for interpolation rates. A digital quadrature modulator with independent, frequency flexible NCOs are available to support multi-band operation. An optional low-jitter PLL/VCO simplifies the DAC sampling clock generation by allowing use of a lower frequency reference clock.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | DAC38RFxx Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL datasheet (Rev. D) | PDF | HTML | 2023/12/28 |
Application note | Impact of Power-Supply Noise on Phase Noise Performance of RF DACs | 2018/06/13 | ||
Application note | Eye Scan Testing with the DAC38RFxx | 2017/08/10 | ||
Application note | Quick-Start Methods in Simulating the DAC38RF8x Input/Output Buffer Information | 2017/08/02 | ||
Application note | DAC38RF8x Test Modes | 2017/07/25 | ||
Design guide | Efficient Power Supply Scheme for RF-Sampling DAC Reference Design | 2016/08/22 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
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지원되는 제품 및 하드웨어
제품
고속 DAC(>10 MSPS)
트랜스미터
리시버
고속 ADC(≥10 MSPS)
RF 샘플링 트랜시버
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This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)
지원되는 제품 및 하드웨어
제품
고속 DAC(>10 MSPS)
트랜스미터
리시버
고속 ADC(≥10 MSPS)
초음파 AFE
RF 샘플링 트랜시버
하드웨어 개발
평가 보드
소프트웨어
지원 소프트웨어
TIDA-01215 — RF 샘플링 DAC에서 스퍼 및 위상 잡음 최적화를 위한 전원 공급 장치 레퍼런스 디자인
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
FCCSP (AAV) | 144 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.