DRV8329-Q1
- 65V Three Phase Half-Bridge Gate Driver
- Drives 3 High-Side and 3 Low-Side N-Channel MOSFETs (NMOS)
- 4.5 to 60V Operating Voltage Range
- Supports 100% PWM Duty Cycle with Trickle Charge pump
- Bootstrap based Gate Driver Architecture
- 1000mA Maximum Peak Source Current
- 2000mA Maximum Peak Sink Current
- Integrated Current Sense Amplifier with low input offset (optimized for 1 shunt)
- Adjustable Gain (5, 10, 20, 40V/V)
- Hardware interface provides simple configuration
- Ultra-low power sleep mode <1uA at 25 ̊C
- 4ns (typ) propagation delay matching between phases
- Independent driver shutdown path (DRVOFF)
- 65V tolerant wake pin (nSLEEP)
- Supports negative transients upto -10V on SHx
- 6x and 3x PWM Modes
- Supports 3.3V, and 5V Logic Inputs
- Accurate LDO (AVDD), 3.3V ±3%, 80mA
- Compact QFN Packages and Footprints
- Adjustable VDS overcurrent threshold through VDSLVL pin
- Adjustable deadtime through DT pin
- Efficient System Design With Power Blocks
- Integrated Protection Features
- PVDD Undervoltage Lockout (PVDDUV)
- GVDD Undervoltage (GVDDUV)
- Bootstrap Undervoltage (BST_UV)
- Overcurrent Protection (VDS_OCP, SEN_OCP)
- Thermal Shutdown (OTSD)
- Fault Condition Indicator (nFAULT)
The DRV8329-Q1 family of devices is an integrated gate driver for three-phase applications. The devices provide three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The device generates the correct gate drive voltages using an internal charge pump and enhances the high-side MOSFETs using a bootstrap circuit. A trickle charge pump is included to support 100% duty cycle. The Gate Drive architecture supports peak gate drive currents up to 1A source and 2A sink. The DRV8329-Q1 can operate from a single power supply and supports a wide input supply range of 4.5 to 60V.
The 6x and 3x PWM modes allow for simple interfacing to controller circuits. The device has integrated accurate 3.3V LDO that can be used to power external controller and can be used as reference for CSA. The configuration settings for the device are configurable through hardware (H/W) pins.
The DRV8329-Q1 devices integrate low-side current sense amplifier that allow current sensing for sum of current from all three phases of the drive stage.
A low-power sleep mode is provided to achieve low quiescent current by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, GVDD fault, MOSFET overcurrent, MOSFET short circuit, and overtemperature. Fault conditions are indicated on nFAULT pin.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | DRV8329-Q1 4.5 to 60V Three-phase BLDC Gate Driver datasheet (Rev. A) | PDF | HTML | 2024/11/15 |
설계 및 개발
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DRV8329AEVM — 3상 BLDC 게이트 드라이버용 DRV8329A 평가 모듈
DRV8329AEVM은 BLDC 모터용 DRV8329A 게이트 드라이버를 기반으로 하는 30A, 3상 브러시리스 DC 드라이브 단계입니다. DRV8329는 외부 다이오드 없이 부트스트랩 작동을 위한 3개의 다이오드를 통합합니다. 이 디바이스에는 저압측 전류 측정을 위한 전류 션트 증폭기, 80mA LDO, 데드 타임 제어 핀, VDS 과전류 레벨 핀 및 게이트 드라이버 차단기 핀이 포함되어 있습니다. EVM에는 이러한 설정을 평가할 수 있는 스위치, 전위차계 및 저항기가 포함되어 있으며 DRV8329 디바이스의 A 버전(6x (...)
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
VQFN (RGF) | 40 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치