홈 전원 관리 AC/DC 및 DC/DC 컨버터(통합 FET)
홈
전원 관리
AC/DC 및 DC/DC 컨버터(통합 FET)

TPS54327

활성

4.5V~18V 입력, 3A 동기형 스텝다운 컨버터

지금 주문
데이터 시트

이 제품의 최신 버전이 있습니다

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
신규 TPS563206 활성 SOT563의 4.2V~17V 입력, 3A 동기 벅 컨버터 This product has a smaller package with less external component count

TPS54327

활성
데이터 시트 지금 주문

제품 상세 정보

Rating Catalog Operating temperature range (°C) -40 to 85 Topology Buck Type Converter Iout (max) (A) 3 Vin (min) (V) 4.5 Vin (max) (V) 18 Switching frequency (min) (kHz) 700 Switching frequency (max) (kHz) 700 Features Enable, Soft Start Adjustable, Synchronous Rectification Control mode D-CAP2 Vout (min) (V) 0.76 Vout (max) (V) 7 Iq (typ) (µA) 800 Duty cycle (max) (%) 65
Rating Catalog Operating temperature range (°C) -40 to 85 Topology Buck Type Converter Iout (max) (A) 3 Vin (min) (V) 4.5 Vin (max) (V) 18 Switching frequency (min) (kHz) 700 Switching frequency (max) (kHz) 700 Features Enable, Soft Start Adjustable, Synchronous Rectification Control mode D-CAP2 Vout (min) (V) 0.76 Vout (max) (V) 7 Iq (typ) (µA) 800 Duty cycle (max) (%) 65
HSOIC (DDA) 8 29.4 mm² 4.9 x 6 VSON (DRC) 10 9 mm² 3 x 3
  • D-CAP2™ Mode Enables Fast Transient
    Response
  • Low-Output Ripple and Allows Ceramic Output
    Capacitor
  • Wide VIN Input Voltage Range: 4.5 V to 18 V
  • Output Voltage Range: 0.76 V to 7 V
  • Highly Efficient Integrated FETs Optimized
    for Lower Duty Cycle Applications
    – 100 mΩ (High-Side) and 70 mΩ (Low-Side)
  • High Efficiency, Less Than 10 µA at shutdown
  • High Initial Bandgap Reference Accuracy
  • Adjustable Soft Start
  • Prebiased Soft Start
  • 700-kHz Switching Frequency (fSW)
  • Cycle-By-Cycle Overcurrent Limit
  • APPLICATIONS
    • Wide Range of Applications for Low Voltage
      System
      • Digital TV Power Supply
      • High Definition Blu-ray Disc™ Players
      • Networking Home Terminal
      • Digital Set Top Box (STB)

All other trademarks are the property of their respective owners
  • D-CAP2™ Mode Enables Fast Transient
    Response
  • Low-Output Ripple and Allows Ceramic Output
    Capacitor
  • Wide VIN Input Voltage Range: 4.5 V to 18 V
  • Output Voltage Range: 0.76 V to 7 V
  • Highly Efficient Integrated FETs Optimized
    for Lower Duty Cycle Applications
    – 100 mΩ (High-Side) and 70 mΩ (Low-Side)
  • High Efficiency, Less Than 10 µA at shutdown
  • High Initial Bandgap Reference Accuracy
  • Adjustable Soft Start
  • Prebiased Soft Start
  • 700-kHz Switching Frequency (fSW)
  • Cycle-By-Cycle Overcurrent Limit
  • APPLICATIONS
    • Wide Range of Applications for Low Voltage
      System
      • Digital TV Power Supply
      • High Definition Blu-ray Disc™ Players
      • Networking Home Terminal
      • Digital Set Top Box (STB)

All other trademarks are the property of their respective owners

The TPS54327 device is an adaptive on-time D-CAP2™ mode synchronous buck converter. TheTPS54327 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54327 uses the D-CAP2 mode control which provides a fast transient response with no external compensation components. The TPS54327 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54327 is available in the 8-pin DDA package and 10-pin DRC, and is designed to operate from –40°C to 85°C.

The TPS54327 device is an adaptive on-time D-CAP2™ mode synchronous buck converter. TheTPS54327 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54327 uses the D-CAP2 mode control which provides a fast transient response with no external compensation components. The TPS54327 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54327 is available in the 8-pin DDA package and 10-pin DRC, and is designed to operate from –40°C to 85°C.
filter 기타 AC/DC 및 DC/DC 컨버터(통합 FET) 찾기
다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
TPS54227 활성 4.5V~18V 입력, 2A 동기형 스텝다운 컨버터(HSOP 및 VSON 패키지) Pin-to-pin compatible lower current product.
TPS54427 활성 4.5V~18V 입력, 4A 동기형 스텝 다운 컨버터 Pin-to-pin compatible higher current product (4 A).

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
5개 모두 보기
유형 직함 날짜
* Data sheet TPS54327 3-A Output Single Synchronous Step-Down Switcher With Integrated FET datasheet (Rev. C) PDF | HTML 2015/12/18
User guide TPS54327 Step-Down Converter Evaluation Module User's Guide (Rev. A) PDF | HTML 2021/10/11
Selection guide Power Management Guide 2018 (Rev. R) 2018/06/25
Application note Optimize Output Filter on D-CAP2 for Stability Improvement 2017/06/13
Application note D-CAP2 Frequency Response Model, based on frequency domain analysis of Fixed On- 2013/01/02

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

TPS54327EVM-686 — TPS54327 3A 동기식 스텝다운 컨버터용 평가 모듈

The TPS54327EVM-686 is a fully assembled and tested circuit for evaluating the TPS54327 synchronous step-down converter. The TPS54327EVM-686 operates from a 4.5-V to 18-V input and provides a 1.05-V output up to 3-A load. The main control loop of TPS54327 uses D-CAP2™ mode control, which (...)

사용 설명서: PDF | HTML
TI.com에서 구매 불가
시뮬레이션 모델

TPS54327 PSPICE (Transient) Model

SLVM108.ZIP (53 KB) - PSpice Model
다운로드
시뮬레이션 모델

TPS54327 TINA-TI Transient Reference Design

SLVM310.TSC (164 KB) - TINA-TI Reference Design
다운로드
시뮬레이션 모델

TPS54327 TINA-TI Transient Spice Model

SLVM311.ZIP (39 KB) - TINA-TI Spice Model
다운로드
레퍼런스 디자인

TIDA-00431 — 8GHz DC 커플링된 차동 증폭기를 사용하는 RF 샘플링 4GSPS ADC 레퍼런스 디자인

Wideband radio frequency (RF) receivers allow greatly increased flexibility in radio designs. The wide instantaneous bandwidth allows flexible tuning without changing hardware and the ability to capture multiple channels at widely separated frequencies.

This reference design describes a wideband RF (...)

Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-01017 — 오실로스코프, 무선 테스터 및 레이더를 위한 고속 멀티 채널 ADC 클록 레퍼런스 디자인

The TIDA-01017 reference design demonstrates the performance of a clocking solution for a high speed multi-channel system, analyzed by measuring the channel to channel skew for the entire input frequency range of the RF sampling ADC. Channel to channel skew is critical for phased array radar and (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-01015 — 디지털 오실로스코프 및 무선 테스터의 12비트 고속 ADC를 위한 4GHz 클록 레퍼런스 디자인

The TIDA-01015 is a clocking solution reference design for high speed direct RF sampling GSPS ADCs. This design showcases the significance of the sampling clock to achieve high SNR for 2nd Nyquist zone input signal frequencies. ADC12J4000 is a 12-bit, 4-GSPS RF sampling ADC with 3-dB input (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00826 — 50Ohm, 2GHz 오실로스코프 프론트 엔드 레퍼런스 디자인

This reference design is part of an analog front-end for 50Ω-input oscilloscope application. System designers can readily use this evaluation platform to process input signals from DC to 2 GHz in both frequency-domain and time-domain applications.
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00432 — Xilinx 플랫폼을 사용하여 페이즈드 어레이 레이더 시스템을 위한 JESD204B 기가 샘플 ADC 동기화

This system level design shows how two ADC12J4000 evaluation modules (EVMs) can be synchronized together using a Xilinx VC707 platform. The design document describes the required hardware modifications and device configurations, including the clocking scheme. Example configuration files are shown (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00359 — GSPS ADC를 위한 클로킹 솔루션 레퍼런스 디자인

Low cost, high performance clocking solution for GSPS data converters. This reference design discusses the use of a TRF3765, a low noise frequency synthesizer, generating the sampling clock for a 4 GSPS analog-to-digital converter (ADC12J4000). Experiments demonstrate data sheet comparable SNR and (...)
Design guide: PDF
회로도: PDF
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
HSOIC (DDA) 8 Ultra Librarian
VSON (DRC) 10 Ultra Librarian
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주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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