TPS65022
- 1.2-A, 97% Efficient Step-Down Converter for
System Voltage (VDCDC1) - 1-A, Up to 95% Efficient Step-Down Converter for
Memory Voltage (VDCDC2) - 900-mA, 90% Efficient Step-Down Converter for
Processor Core (VDCDC3) - 30-mA LDO and Switch for Real-Time Clock
(VRTC) - 2 × 200 mA General-Purpose LDO
- Dynamic Voltage Management for Processor Core
- Preselectable LDO Voltage Using Two Digital
Input Pins - Externally Adjustable Reset Delay Time
- Battery Backup Functionality
- Separate Enable Pins for Inductive Converters
- I2C Compatible Serial Interface
- 85-µA Quiescent Current
- Low Ripple PFM Mode
- Thermal Shutdown Protection
The TPS65022 is an integrated Power Management IC for applications powered by one Li-Ion or Li-Polymer cell, and which require multiple power rails. The TPS65022 provides three highly efficient, step-down converters targeted at providing the core voltage, peripheral, I/O and memory rails in a processor based system.
All three step-down converters enter a low-power mode at light load for maximum efficiency across the widest possible range of load currents. The TPS65022 also integrates two general-purpose 200-mA LDO voltage regulators, which are enabled with an external input pin. Each LDO operates with an input voltage range between 1.5 V and 6.5 V, allowing them to be supplied from one of the step-down converters or directly from the battery.
The default output voltage of the LDOs can be digitally set to 4 different voltage combinations using the DEFLDO1 and DEFLDO2 pins.
The serial interface can be used for dynamic voltage scaling, masking interrupts, or for disabling, enabling, and setting the LDO output voltages. The interface is compatible with the Fast/Standard mode I2C specification, allowing transfers at up to 400 kHz. The TPS65022 is available in a 40-pin (RHA) VQFN package, and operates over a free-air temperature of –40°C to 85°C.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | TPS65022 Power Management IC for Li-Ion Powered Systems datasheet (Rev. B) | PDF | HTML | 2016/01/13 |
Application note | Optimizing Resistor Dividers at a Comparator (Rev. B) | PDF | HTML | 2021/04/30 | |
Application note | LDO Noise Demystified (Rev. B) | PDF | HTML | 2020/08/18 | |
Application note | LDO PSRR Measurement Simplified (Rev. A) | PDF | HTML | 2017/08/09 | |
Application note | Basic Calculation of a Buck Converter's Power Stage (Rev. B) | 2015/08/17 | ||
Application note | Understanding the Absolute Maximum Ratings of the SW Node (Rev. A) | 2012/01/13 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
VQFN (RHA) | 40 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치