UCC20520
- Single input, dual output
- Operating temperature range: –40 to 125°C
- Switching parameters:
- 19-ns typical propagation delay
- 10-ns minimum pulse width
- 5-ns maximum delay matching
- 6-ns maximum pulse-width distortion
- Common-mode transient immunity (CMTI) greater than 100-V/ns
- Surge immunity up to 12.8-kV
- Isolation barrier life >40 Years
- 4-A peak source, 6-A peak sink output
- TTL and CMOS compatible inputs
- 3-V to 18-V input VCCI range to interface with both digital and analog controllers
- Up to 25-V VDD output drive supply
- Programmable dead time
- Rejects input pulses and noise transients shorter than 5-ns
- Fast disable for power sequencing
- Industry standard wide body SOIC-16 (DW) package
- Safety-related and regulatory approvals:
- 8000-VPK isolation per DIN V VDE V 0884-11:2017-01
- 5700-VRMS isolation for 1 minute per UL 1577
- CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
- CQC certification per GB4943.1-2011
The UCC20520 is an isolated single input, dual-channel gate driver with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.
The input side is isolated from the two output drivers by a 5.7-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500-VDC.
This driver can be used for half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.
The device accepts VDD supply voltages up to 25-V. A wide input VCCI range from 3-V to 18-V makes the driver suitable for interfacing with both analog and digital controllers. All the supply voltage pins have under voltage lock-out (UVLO) protection.
With all these advanced features, the UCC20520 enables high efficiency, high power density, and robustness in a wide variety of power applications.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | UCC20520 4-A, 6-A, 5.7-kVRMS Isolated Dual-Channel Gate Driver with Single Input datasheet (Rev. A) | PDF | HTML | 2022/01/11 |
| Certificate | VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. W) | 2025/03/04 | ||
| Certificate | UCC215xx CQC Certificate of Product Certification | 2023/08/17 | ||
| Certificate | UCC21520 CQC Certificate of Product Certification (Rev. A) | 2023/08/16 | ||
| Certificate | UL Certification E181974 Vol 4. Sec 7 (Rev. C) | 2022/12/02 | ||
| Application brief | The Use and Benefits of Ferrite Beads in Gate Drive Circuits | PDF | HTML | 2021/12/16 | |
| EVM User's guide | Using the UCC21520EVM-286, UCC21521CEVM-286, and UCC21530EVM286 User's Guide (Rev. C) | PDF | HTML | 2021/10/21 | |
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 2020/02/28 | ||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 2020/02/28 | ||
| Certificate | CSA Product Certificate (Rev. A) | 2019/08/15 |
설계 및 개발
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UCC21520EVM-286 — UCC21520 4A/6A 절연 듀얼 채널 게이트 드라이버 평가 모듈
UCC21520EVM-286 is designed for evaluating UCC21520DW, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM could be served as a reference design for driving power MOSFETS, IGBTS, and SiC MOSFETS with UCC21520 pin function identification, (...)
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| SOIC (DW) | 16 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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